公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2021 | A Jitter-Tolerance-Enhanced Digital CDR Circuit Using Background Loop Gain Controller | Yao Y.-S; Huang C.-C; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems II: Express Briefs | 0 | 0 | |
2009 | A leakage-compensated PLL in 65-nm CMOS technology | Hung, C.-C.; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems II: Express Briefs | 20 | 17 | |
1995 | Linear transformation all-pole filters based on current conveyors | Hwang, Y.-S.; Liu, S.-I.; Wu, D.-S.; Wu, Y.-P.; SHEN-IUAN LIU | International Journal of Electronics | 6 | 2 | |
2009 | Loop latency reduction technique for all-digital clock and data recovery circuits | I-Fong Chen; Rong-Jyi Yang; Shen-Iuan Liu; SHEN-IUAN LIU | IEEE Asian Solid-State Circuits Conference | 7 | 0 | |
2004 | Low jitter and multi-rate clock and data recovery circuit using a MSADLL for chip-to-chip interconnection | Hsiang-Hui Chang; Rong-Jyi Yang; Shen-Iuan Liu; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems I: Regular Papers | 21 | 12 | |
2003 | Low jitter Butterworth delay-locked loops | Chang, Hsiang-Hui; Sun, Chih-Hao; Liu, Shen-Iuan | 2003 Symposium on VLSI Circuits | 3 | 0 | |
2004 | Low voltage and low power CMOS exponential-control variable-gain amplifier | Weihsing Liu; Shen-Iuan Liu; Shui-Ken Wei; SHEN-IUAN LIU | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 4 | 4 | |
1994 | Low voltage CMOS four-quadrant multiplier | SHEN-IUAN LIU | Electronics Letters | 37 | 33 | |
2001 | Low voltage CMOS low noise amplifier using the planar interleaved transformer | Chih-Chun Tang; Shen-Iuan Liu; SHEN-IUAN LIU | Electronics Letters | 19 | 17 | |
0 | Low voltage Pipelined Analog-to-Digital Converter | SHEN-IUAN LIU | | | | |
2015 | A low-input-swing AC-DC voltage multiplier using Schottky diodes | Luo, Y.-S.; Liu, S.-I.; SHEN-IUAN LIU | Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014 | 1 | 0 | |
2002 | Low-jitter DLLs with the butterworth characteristics | Lan-Cho Chou; Chih-Hao Sun; Shen-Iuan Liu; SHEN-IUAN LIU | 2002 VLSI/CAD | | | |
2022 | A Low-Jitter Sub-Sampling PLL With a Sub-Sampling DLL | Qian Y.C; Chao Y.Y; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems II: Express Briefs | 5 | 9 | |
1999 | Low-power clock-deskew buffer for high-speed digital circuits | Liu, S.-I.; Lee, J.-H.; HEN-WAI TSAO ; SHEN-IUAN LIU ; JIUN-HAW LEE | IEEE Journal of Solid-State Circuits | 26 | 24 | |
2001 | Low-voltage analog tripler circuit | Cheng-Chieh Chang; Yuh-Shyang Hwang; Shen-Iuan Liu; SHEN-IUAN LIU | Journal of Analog Integrated Circuits and Signal Processing | 2 | 1 | |
2004 | Low-voltage and low-power CMOS voltage-to-current converter | Weihsing Liu; Shen-Iuan Liu; SHEN-IUAN LIU | IEICE Transactions on Electronics | 7 | 3 | |
1999 | Low-voltage BiCMOS four-quadrant multiplier and squarer | Shen-Iuan Liu; Jiin-Long Lee; Cheng-Chieh Chang; SHEN-IUAN LIU | Journal of Analog Integrated Circuits and Signal Processing | 3 | 6 | |
1999 | Low-voltage BiCMOS four-quadrant multiplier using triode-region transistors | Shen-Iuan Liu; Jiin-Long Lee; Cheng-Chieh Chang; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications | 2 | 2 | |
1997 | Low-voltage CMOS four-quadrant multiplier | SHEN-IUAN LIU ; Chang, Chen-Chieh | Electronics Letters | 14 | 12 | |
1996 | Low-voltage CMOS four-quadrant multiplier based on square-difference identity | SHEN-IUAN LIU ; Chang, C.C. | IEE Proceedings: Circuits, Devices and Systems | 6 | 7 | |