公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
1998 | Algorithm-Based Low-Power Transform Coding Architectures: The Multirate Approach | AN-YEU(ANDY) WU ; Liu, K. J. Ray | IEEE Transactions Very Large Scale Integration (VLSI) Systems | 5 | 3 | |
1994 | Algorithms and architectures for split recursive least squares | AN-YEU(ANDY) WU ; Liu, K.J.Ray; AN-YEU(ANDY) WU | IEEE Workshop on VLSI Signal Processing | | | |
2015 | An algorithmic error-resilient scheme for robust LDPC decoding | AN-YEU(ANDY) WU ; Li, H.-T.; Lee, D.-Y.; Chen, K.-C.; AN-YEU(ANDY) WU | 2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015 | | | |
2008 | An efficient methodology to evaluate nanoscale circuit fault-tolerance performance based on Belief Propagation | AN-YEU(ANDY) WU ; Rao, H.; Chen, J.; Zhao, V.H.; Ang, W.T.; Wey, I.-C.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | | | |
2001 | An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitter | AN-YEU(ANDY) WU ; Yu, C.-L.; AN-YEU(ANDY) WU | Materials Research Society Symposium | | | |
2003 | Angle quantization approach for lattice IIR filter implementation and its trellis de-allocation algorithm | Wu, An-Yeu ; Lee, I-Hsien; Wu, Cheng-Shing | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | 0 | 0 | |
2015 | Ant Colony Optimization-based Adaptive Network-on-Chip Routing Framework Using Network Information Region | Hsien-Kai Hsin; En-Jui Chang; Kuan-Yu Su; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Computers(TC) | 14 | 14 | |
2015 | Ant Colony Optimization-Based Adaptive Network-on-Chip Routing Framework Using Network Information Region | AN-YEU(ANDY) WU ; Hsin, H.-K.; Chang, E.-J.; Su, K.-Y.; AN-YEU(ANDY) WU | IEEE Transactions on Computers | | | |
2014 | Ant colony optimization-based fault-aware routing in mesh-based network-on-chip systems | AN-YEU(ANDY) WU ; Hsin, H.-K.; Chang, E.-J.; Lin, C.-A.; AN-YEU(ANDY) WU | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | | | |
2014 | Ant Colony Optimization-Based Fault-Aware Routing in Mesh-based Network-on-Chip Systems | Hsien-Kai Hsin; En-Jui Chang; Chia-An Lin; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) | 21 | 15 | |
1989 | Applications of Distributed Arithmetic to Digital Signal Processing:
A Tutorial Review | 吳安宇 | | | | |
2011 | Area-Efficient Scalable MAP Processor Design for High-Throughput Multistandard Convolutional Turbo Decoding | Chen-Hung Lin; Chun-Yu Chen; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 45 | 34 | |
2011 | Area-efficient scalable MAP processor design for high-throughput multistandard convolutional turbo decoding | AN-YEU(ANDY) WU ; Lin, C.-H.; Chen, C.-Y.; AN-YEU(ANDY) WU | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | | | |
2004 | Area-efficient VLSI design of Reed-Solomon decoder for 10GBase-LX4 optical communication systems | Hsu, Huai-Yi; Yeo, Jih-Chiang; Wu, An-Yeu | IEEE Asia-Pacific Conference on Advanced System Integrated Circuits | 0 | 0 | |
2006 | Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical Communication Systems | Huai-Yi Hsu; An-Yeu Wu; Jih-Chiang Yeo; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Circuits and Systems II: Express Briefs | 44 | 32 | |
2022 | Automated Quantization Range Mapping for DAC/ADC Non-linearity in Computing-In-Memory | Huang, Chi Tse; YU-CHUAN CHUANG; Lin, Ming Guang; AN-YEU(ANDY) WU | Proceedings - IEEE International Symposium on Circuits and Systems | 1 | 0 | |
2002 | Basic Division Scheme | 吳安宇 | | | | |
2024 | BFP-CIM: Data-Free Quantization with Dynamic Block-Floating-Point Arithmetic for Energy-Efficient Computing-In-Memory-based Accelerator | Chang, Cheng Yang; Huang, Chi Tse; YU-CHUAN CHUANG; Chou, Kuang Chao; AN-YEU(ANDY) WU | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC | | | |
2019 | Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor | Ding-Yuan Lee; Ching-Che Wang; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transaction on Very Large Scale Integration (VLSI) Systems (TVLSI) | 5 | 13 | |
2015 | Byte-reconfigurable LDPC codec design with application to high-performance ECC of NAND flash memory systems | AN-YEU(ANDY) WU ; Lin, Y.-M.; Li, H.-T.; Chung, M.-H.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems I: Regular Papers | | | |