公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2016 | 2QBF: Challenges and Solutions | Valeriy Balabanov; Jie-Hong Rol; Jiang, Christoph Scholl; Alan Mishchenko; Robert K. Brayton; JIE-HONG JIANG | Int'l Conf. on Theory and Applications of Satisfiability Testing (SAT) | 7 | 0 | |
2008 | A Dynamic Accuracy-Refinement Approach to Timing-Driven Technology Mapping | Sz-Cheng Huang; Jie-Hong R. Jiang; JIE-HONG JIANG | IEEE Int'l Conf. on Computer Design (ICCD'08) | 0 | 0 | |
2015 | A General Framework for Efficient Performance Analysis of Acyclic Asynchronous Pipelines | Yi-Hsiang Lai; Chi-Chuan Chuang; Jie-Hong R. Jiang; JIE-HONG JIANG | International Conference on Computer- Aided Design (ICCAD) | 5 | 0 | |
2010 | A Robust Functional ECO Engine by SAT Proof Minimization and Interpolation Techniques | Bo-Han Wu; Chun-Ju Yang; Chung-Yang (Ric) Huang; Jie-Hong (Rol; ) Jiang; CHUNG-YANG HUANG ; JIE-HONG JIANG | IEEE/ACM International Conference on Computer-Aided Design (ICCAD) | 36 | 0 | |
2007 | A Statistical Approach to the Timing-Yield Optimization of Pipeline Circuits | Chin-Hsiung Hsu; Szu-Jui Chou; Jie-Hong R. Jiang; Yao-Wen Chang; JIE-HONG JIANG | Int'l Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS'07) | 0 | 0 | |
2022 | Accurate BDD-based unitary operator manipulation for scalable and robust quantum circuit verification | Wei, Chun Yu; Tsai, Yuan Hung; Jhang, Chiao Shan; JIE-HONG JIANG | Proceedings - Design Automation Conference | 6 | 0 | |
2022 | Advances in Quantum Computation and Quantum Technologies: A Design Automation Perspective | De Micheli, Giovanni; JIE-HONG JIANG ; Rand, Robert; Smith, Kaitlin; Soeken, Mathias | IEEE Journal on Emerging and Selected Topics in Circuits and Systems | 4 | 2 | |
2016 | Analytic approaches to the collapse operation and equivalence verification of threshold logic circuits | Nian-Ze Lee; Hao-Yuan Kuo; Yi-Hsiang Lai; Jie-Hong R. Jiang; JIE-HONG JIANG ; 江介宏 | International Conference on Computer-Aided Design (ICCAD) | 5 | 0 | |
2005 | Applied Logic & Computation for System Design- An introductory invitation | Jiang, Jie-Hong R.; 江介宏 | | | | |
2019 | An approximation algorithm to the optimal switch control of reconfigurable battery packs | Shih-Yu Chen; Jie-Hong R. Jiang; Shou-Hung Welkin Ling; Shih-Hao Liang; Mao-Cheng Huang; JIE-HONG JIANG ; 江介宏 | Asia and South Pacific Design Automation Conference (ASP-DAC) | 0 | 0 | |
2011 | Ashenhurst Decomposition Using SAT and Interpolation | Hsuan-Po Lin; Jie-Hong Rol Jiang; Ruei-Rung Lee; JIE-HONG JIANG ; Hsuan-Po Lin;Jie-Hong Rol Jiang;Ruei-Rung Lee | | | | |
2011 | Ashenhurst decomposition using SAT and interpolation | Lin, H.-P.; Jiang, J.-H.R.; Lee, R.-R.; JIE-HONG JIANG | Advanced Techniques in Logic Synthesis, Optimizations and Applications | 0 | 0 | |
2015 | Asynchronous QDI Circuit Synthesis from Signal Transition Protocols | Bo-Yuan Huang; Yi-Hsiang Lai; Jie-Hong R. Jiang; JIE-HONG JIANG | International Conference on Computer- Aided Design (ICCAD) | 0 | 0 | |
2012 | Automatic Decoder Synthesis: Methods and Case Studies | Hsiou-Yuan Liu; Yen-Cheng Chou; Chen-Hsuan Lin; Jie-Hong R. Jiang; JIE-HONG JIANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) | 2 | 2 | |
2013 | Automatic Test Pattern Generation for Delay Defects Using Timed Characteristic Functions | Shin-Yann Ho; Shuo-Ren Lin; Ko-Lung Yuan; Chien-Yen Kuo; Kuan-Yu Liao; Jie-Hong R. Jiang; Chien-Mo James Li; JIE-HONG JIANG | IEEE/ACM International Conference on Computer-Aided Design (ICCAD) | | | |
2013 | Automatic test pattern generation for delay defects using timed characteristic functions. | Ho, Shin-Yann; Lin, Shuo-Ren; Yuan, Ko-Lung; Kuo, Chien-Yen; Liao, Kuan-Yu; Jiang, Jie-Hong R.; CHIEN-MO LI ; JIE-HONG JIANG | The IEEE/ACM International Conference on Computer-Aided Design, ICCAD'13, San Jose, CA, USA, November 18-21, 2013 | 2 | 0 | |
1997 | BDD based lambda set selection in Roth-Karp decomposition for LUT architecture. | Jiang, Jie-Hong R.; Jou, Jing-Yang; Huang, Juinn-Dar; Wei, Jung-Shian; JIE-HONG JIANG | Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, Nippon Convention Center, Chiba, Japan, January 28-31, 1997 | 0 | 0 | |
2008 | Bi-Decomposing Large Boolean Functions via Interpolation and Satisfiability Solving | Ruei-Rung Lee; Jie-Hong R. Jiang; Wei-Lun Hung; JIE-HONG JIANG | ACM/IEEE Design Automation Conference (DAC'08) | 35 | 0 | |
2008 | Bi-decomposing large Boolean functions via interpolation and satisfiability solving. | Lee, Ruei-Rung; Jiang, Jie-Hong Roland; Hung, Wei-Lun; JIE-HONG JIANG | Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008 | 0 | 0 | |
2011 | Bi-decomposition Using SAT and Interpolation | Ruei-Rung Lee; Jie-Hong Rol Jiang; Wei-Lun Hung; JIE-HONG JIANG | | | | |