公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
1991 | A New Control Strategy for an Artificial Intelligence Approach to VLSI Layout Compaction | Hsiao, P. Y.; Chen, H. F. S.; 馮武雄; Feng, Wu-Shiung | The VLSI Journal of Integration | | | |
1995 | A New Delay Model with the Considerations of Internal Charges | Wang, J. H.; Fan, J. T.; 馮武雄; Feng, Wu-Shiung | IEEE Proceedings. E, Computers and digital techniques | | | |
1987 | A New Dynamic Switch-Box Router | Chang, K. E.; 馮武雄; Feng, Wu-Shiung | Proceedings of National Computer Symposium 1987 | | | |
1992 | A New Efficient Approach to Multilayer Channel Routing Problem | Fang, S. C.; 馮武雄; Lee, S. L.; Feng, Wu-Shiung | The 29th ACM/IEEE Design Automation Conference, Anahan, CA(1992.06) | | | |
1995 | New Efficient Designs for XOR and XNOT Functions on Transistor Level | Wang, J. M.; Fan, S. C.; 馮武雄; Feng, Wu-Shiung | IEEE Journal of Solid-State Circuits | | | |
1990 | A New Hybrid Sense Algorithm for Three-Layer Via Minimization with Practical Constraints | Fang, S. C.; Chang, K. E.; 馮武雄; Feng, Wu-Shiung | Proceedings of International Computer Symposium | | | |
1992 | New Interactive Construction Approach to Routing with Compacted Area | Tsai, C. C.; 陳少傑; Hsiao, P. Y.; 馮武雄; Chen, Sao-Jie; Feng, Wu-Shiung | IEEE Proceedings. E, Computers and digital techniques | | | |
1991 | A New Iterative Construction Approach to Routing with Compacted Area | Tsai, C. C.; Chen, S. J.; Hsiao, P. Y.; 馮武雄; Feng, Wu-Shiung | IEEE Proceedings. E, Computers and Digital Techniques | | | |
1990 | A New Method for Two-Dimensional VLSI Layout Compaction Design | Chen, H. F.; Hsiao, P, Y.; 馮武雄; 陳少傑 ; Feng, Wu-Shiung; Chen, Sao-Jie | 1990 2nd Workshop on CAD for VLSI | | | |
1992 | A Novel Current Model for CMOS Gates | Wang, J. H.; Fan, J. T.; 馮武雄; Feng, Wu-Shiung | The 1992 IEEE International Symposium on Circuits and Systems, San Diego | | | |
1989 | A Novel Implementation of Pipelined Toeplitz System Solver | Jou, I. C.; Hu, Y. H.; 馮武雄; Feng, Wu-Shiung | Proceeding of IEEE | | | |
1990 | Optimal Aspect Ratios of Building Blocks for Floorplan Designs | Shih, P. H.; 馮武雄; Feng, Wu-Shiung | IASTED:International Symposium on Modelling, Simulation, and Optimization, Montreal, Canada(1990.05.22-05.24) | | | |
1990 | Optimal Aspect Ratios of Building Blocks for Generally Structured VLSI Floorplan Design | Shih, P. H.; 馮武雄; Feng, Wu-Shiung | The 2nd Workshop on CAD for VLSI | | | |
1986 | Parallel Algorithm and Architecture for Solving Covariance Eigen System | Jou, I. C.; Hu, Y. H.; 于惠中; 馮武雄; Yu, Hui-Jung; Feng, Wu-Shiung | Advances in Modelling and Simulation, France | | | |
1989 | The Pin Alignment in VLSI Routing with Movable Terminals | Chang, K. E.; Fu, C. M.; 馮武雄; Feng, Wu-Shiung | Proceedings of National Computer Symposium | | | |
1987 | Placement and Routing with Power/Ground | Chen, J. Y.; Wang, C. S.; Tseng, J. N.; 馮武雄; Feng, Wu-Shiung | 1987 International Symposium on VLSI Technology, Systems, and Applications, Taipei(1987.05) | | | |
1986 | Private Database Management System for VLSI Design | Parng, T. P.; 馮武雄; 于惠中; Chen, C. F.; Cheng, K. D.; Feng, Wu-Shiung; Yu, Hui-Jung | | | | |
1992 | A Recursive Algorithm for Computing Delays in RC Networks with Internal Charges | Wang, J. H.; Fan, J. T.; 馮武雄; Feng, Wu-Shiung | The 1992 IEEE International Symposium on Circuits and Systems, San Diego, CA(1992.05.10-05.13) | | | |
1991 | Routing Area Compaction Based on Iterative Construction | Tsai, C. C.; Chen, S. J.; Hsiao, P. Y.; 馮武雄; Feng, Wu-Shiung | Journal of the Chinese Institute of Engineers | | | |
1990 | Routing Techniques in Staircase Channels | Fang, S. C.; 陳少傑 ; 馮武雄; Chen, Sao-Jie ; Feng, Wu-Shiung | 1990 2nd Workshop on CAD for VLSI | | | |