公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
1986 | Data Path Modeling and Synthesizing for Digital Systems | Sun, L. F.; 龐台銘; 馮武雄; Parng, Tai-Ming; Feng, Wu-Shiung | International ASME Conference on Modelling and Simulation, Williamsburg | | | |
1992 | Delay Calculation by Using Novel Logical Expression | Wang, J. H.; Chang, M.; 馮武雄; Feng, Wu-Shiung | Asia Pacific Conference on Circuits and Systems, Australia(1992.12.08-12.11) | | | |
1985 | Design and Implementation of a Data Path Synthesizer for Digital System | Chu, P. C.; Sun, L. F.; 龐台銘; 于惠中; 馮武雄; Feng, Wu-Shiung | 1985 ROC Electron Devices and Materials Symposium, Hsinchu(1985.09) | | | |
1985 | The Design and Implementation of a Mixed-Level Logic Simulator | Tran, K. T.; 龐台銘; 于惠中; 馮武雄; Tyan, C. L.; Ou, H. C.; Feng, Wu-Shiung | 1985 ROC Electron Devices and Materials Symposium, Hsinchu(1985.09) | | | |
1985 | Design and Implementation of a Net-List Driven Layout System | Chen, S. J.; Shi, M. C.; Jan, S. S.; Fan, J. P.; 馮武雄; Feng, Wu-Shiung | 1985 ROC Electron Devices and Materials Symposium, Hsinchu(1985.09) | | | |
1986 | Design and Implementation of Microprogrammed-Controller Synthesizer | 于惠中; Parng, T. P.; 馮武雄; Chen, C. F.; Sun, L. F.; Yu, Hui-Jung; Feng, Wu-Shiung | | | | |
1986 | Design and Implementation of Schematic-Entry Generation System | 馮武雄; Parng, T. P.; 于惠中; Chen, C. F.; Feng, Wu-Shiung; Yu, Hui-Jung | | | | |
1985 | Design Verification System Vol. 1:Design and Implementation of a Mixed-Level Logic Simulator | 于惠中; 龐台銘; 馮武雄; Chen, S. J.; Wu, J. K.; Feng, Wu-Shiung | | | | |
1985 | Design Verification System Vol. 2:the Knowledge-Based Microcomputer System Troubleshooter | 于惠中; 龐台銘; 馮武雄; Chen, S. J.; Wu, J. K.; Feng, Wu-Shiung | | | | |
1988 | An Edge-Oriented Compaction Scheme Based on Multiple Storage Quad Tree | Hsiao, P. Y.; 馮武雄; Feng, Wu-Shiung | The 1988 IEEE International Symposium on Circuits and Systems, Finland(1988.06.06) | | | |
1992 | The Effects of Internal Charges to Waveform Calculation | Wang, J. H.; Chang, M.; 馮武雄; Feng, Wu-Shiung | Asia Pacific Conference on Circuits and Systems, Australia(1992.12.08-12.11) | | | |
1989 | An Efficient Layer Assignment for Three-Layer Restrictive VLSI Routing | Chang, K. E.; Fang, S. C.; 馮武雄; Feng, Wu-Shiung | Proceedings of Electron Devices and Materials Symposium | | | |
1987 | Extraction and Modeling of VLSI Cell Layout | Yeh, K. F.; 馮武雄; Feng, Wu-Shiung | 1987 Electron Devices and Materials Symposium, Taipei(1987.09) | | | |
1987 | FAMI:A Fast Logic Minimizer for PLA Design | Maa, N. S.; 馮武雄; Feng, Wu-Shiung | Proceedings of | | | |
1987 | A Fault Grader | Chen, T. H.; 馮武雄; 林呈祥; Feng, Wu-Shiung; Lin, Chen-Shang | Proceedings of 1987 Electron Devices and Materials Symposium | | | |
1991 | A General-Purpose Hopfield Network Simulator | Shih, P. H.; 馮武雄; Feng, Wu-Shiung | The 9th IASTED International Symposium on Applied Informatics, Innsbruck, Austria(1991.02.18-02.21) | | | |
1990 | Generalized Terminal Connectivity Problem | Tsai, C. C.; Chen, S. J.; 馮武雄; Feng, Wu-Shiung | Computer-Aided Design | | | |
1989 | Generalized Terminal Connectivity Problem for Multi-Layer Layout Scheme | Tsai, C. C.; 馮武雄; 陳少傑 ; Hsiao, P, Y.; Chen, H. F.; Feng, Wu-Shiung; Chen, Sao-Jie | 1989 Joint Technical Conference on Circuits/Systems, Computers and Communications | | | |
1988 | A Global Approach for Via Minimization | Jyu, H. F.; 馮武雄; Feng, Wu-Shiung | Proceedings of International Computer Symposium | | | |
1989 | Graph Contractibility Problem for VLSI Layer Assignment | Chang, K. E.; 馮武雄; Feng, Wu-Shiung | Journal of the Chinese Institute of Engineers | | | |