公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
1990 | Optimal Aspect Ratios of Building Blocks for Floorplan Designs | Shih, P. H.; 馮武雄; Feng, Wu-Shiung | IASTED:International Symposium on Modelling, Simulation, and Optimization, Montreal, Canada(1990.05.22-05.24) | | | |
1990 | Optimal Aspect Ratios of Building Blocks for Generally Structured VLSI Floorplan Design | Shih, P. H.; 馮武雄; Feng, Wu-Shiung | The 2nd Workshop on CAD for VLSI | | | |
1986 | Parallel Algorithm and Architecture for Solving Covariance Eigen System | Jou, I. C.; Hu, Y. H.; 于惠中; 馮武雄; Yu, Hui-Jung; Feng, Wu-Shiung | Advances in Modelling and Simulation, France | | | |
1989 | The Pin Alignment in VLSI Routing with Movable Terminals | Chang, K. E.; Fu, C. M.; 馮武雄; Feng, Wu-Shiung | Proceedings of National Computer Symposium | | | |
1987 | Placement and Routing with Power/Ground | Chen, J. Y.; Wang, C. S.; Tseng, J. N.; 馮武雄; Feng, Wu-Shiung | 1987 International Symposium on VLSI Technology, Systems, and Applications, Taipei(1987.05) | | | |
1986 | Private Database Management System for VLSI Design | Parng, T. P.; 馮武雄; 于惠中; Chen, C. F.; Cheng, K. D.; Feng, Wu-Shiung; Yu, Hui-Jung | | | | |
1992 | A Recursive Algorithm for Computing Delays in RC Networks with Internal Charges | Wang, J. H.; Fan, J. T.; 馮武雄; Feng, Wu-Shiung | The 1992 IEEE International Symposium on Circuits and Systems, San Diego, CA(1992.05.10-05.13) | | | |
1991 | Routing Area Compaction Based on Iterative Construction | Tsai, C. C.; Chen, S. J.; Hsiao, P. Y.; 馮武雄; Feng, Wu-Shiung | Journal of the Chinese Institute of Engineers | | | |
1990 | Routing Techniques in Staircase Channels | Fang, S. C.; 陳少傑 ; 馮武雄; Chen, Sao-Jie ; Feng, Wu-Shiung | 1990 2nd Workshop on CAD for VLSI | | | |
1985 | A Routing Tool | Yao, H. H.; 馮武雄; 龐台銘; 于惠中; Yu, Hui-Jung | 1985 ROC Electron Devices and Materials Symposium, Hsinchu(1985.09) | | | |
1988 | A Rule-Based Compactor for VLSI/CAD Mask Layout | Hsiao, P. Y.; Syau, C. Y.; 馮武雄; 龐台銘; Hsu, C. C.; Feng, Wu-Shiung; Parng, Tai-Ming | COMPSAC'88:the 12th Annual International Computer Software & Applications Conference, Chicago, IL(1988.10.05) | | | |
1988 | A Rule-Based Expert System for VLSI Layout Compaction | Hsiao, P. Y.; 馮武雄; Feng, Wu-Shiung | IECON '88:the 14th Annual Conference of IEEE Industrial Electronics Society, Hyatt Regency, Singapore(1988.10.25) | | | |
1986 | Schematic Layout Editor | Wang, C. I.; 馮武雄; 龐台銘; Feng, Wu-Shiung; Parng, Tai-Ming | 1986 Electron Devices and Materials Symposium, Tainan(1986.08) | | | |
1992 | A Short-Channel CMOS Inverter Propagation Delay Model Suitable for Timing Verification | Chow, H. C.; 馮武雄; Feng, Wu-Shiung | Asia Pacific Conference on Circuits and Systems, Australia(1992.12.08-12.11) | | | |
1986 | Test Sequence Generator | Ou, H. C.; 馮武雄; Liaw, H. T.; Feng, Wu-Shiung | Proceedings of 1986 Electron Devices and Materials Symposium | | | |
1986 | Three Layer Routing Algorithms for VLSI Design | 馮武雄; Parng, T. P.; 于惠中; Chen, C. F.; Feng, Wu-Shiung; Yu, Hui-Jung | | | | |
1986 | Top-Down Placement for Hierarchical Layout System | Chang, K. E.; 馮武雄; Feng, Wu-Shiung | 1986 Electron Devices and Materials Symposium, Tainan(1986.08) | | | |
1988 | The Topological Order Determination for Three-Layer Channel Routing Problem | Chang, K. E.; Lai, T. H.; 馮武雄; Feng, Wu-Shiung | Proceedings of International Computer Symposium | | | |
1990 | A Topological Sorting Algorithm for Three-Layer Channel Routing | Chang, K. E.; Lai, T. H.; 馮武雄; Feng, Wu-Shiung | Journal of the Chinese Institute of Engineers | | | |
1991 | Transient Sensitivity Computation for Waveform Relaxation-Based Timing Simulation | Chen, C. J.; 徐爵民; 馮武雄; Shyn, Jyuo-Min; Feng, Wu-Shiung | ICCAD-91: International Conference on Computer-Aided Design, Santa Clara, Ca(1991.11.10-11.14) | | | |