| Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
| 2000 | B*-Trees: a new representation for non-slicing floorplans. | Chang, Yun-Chih; Chang, Yao-Wen; Wu, Guang-Ming; Wu, Shu-Wei; YAO-WEN CHANG | Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000. | 0 | 0 | |
| 2000 | B<sup>*</sup>-trees: a new representation for non-slicing floorplans | Chang, Yun-Chih; Chang, Yao-Wen; Wu, Guang-Ming; Wu, Shu-Wei; YAO-WEN CHANG | Design Automation Conference | 445 | | |
| 2018 | beta-Nitrostyrene derivatives attenuate LPS-mediated acute lung injury via the inhibition of neutrophil-platelet interactions and NET release | Chang, Yao-Wen; Tseng, Ching-Ping; Lee, Chih-Hsun; Hwang, Tsong-Long; Chen, Yu-Li; Su, Mei-Tzu; Chong, Kowit-Yu; Lan, Ying-Wei; Wu, Chin-Chung; Chen, Kung-Ju; Lu, Fen-Hua; Liao, Hsiang-Ruei; Hsueh, Chuen; Hsieh, Pei-Wen; YAO-WEN CHANG | American Journal of Physiology-Lung Cellular and Molecular Physiology | 7 | 5 | |
| 2019 | BiG: A Bivariate Gradient-Based Wirelength Model for Analytical Circuit Placement. | Sun, Fan-Keng; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019, Las Vegas, NV, USA, June 02-06, 2019 | 0 | 0 | |
| 2007 | BioRoute: a network-flow based routing algorithm for digital microfluidic biochips. | Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; CHIA-LIN YANG | 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007 | 78 | 0 | |
| 2008 | BioRoute: A network-flow-based routing algorithm for the synthesis of digital microfluidic biochips | Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; YAO-WEN CHANG ; Yang, Chia-Lin | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 68 | 48 |  |
| 2009 | BIST design optimization for large-scale embedded memory cores. | Chien, Tzuo-Fan; Chao, Wen-Chi; Li, James Chien-Mo; Chang, Yao-Wen; Liao, Kuan-Yu; Chang, Ming-Tung; Tsai, Min-Hsiu; Tseng, Chih-Mou; YAO-WEN CHANG | 2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 2009 | 7 | 0 | |
| 2014 | Buffered clock tree synthesis considering self-heating effects. | Lin, Chung-Wei; Hsu, Tzu-Hsuan; Shih, Xin-Wei; Chang, Yao-Wen; CHUNG-WEI LIN | International Symposium on Low Power Electronics and Design, ISLPED'14, La Jolla, CA, USA - August 11 - 13, 2014 | 0 | 0 | |
| 1999 | Clustering- and probability-based approach for time-multiplexed FPGA partitioning | Chao, Mango Chia-Tso; Wu, Guang-Ming; Jiang, Iris Hui-Ru; Chang, Yao-Wen; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 17 | | |
| 1999 | A clustering- and probability-based approach for time-multiplexed FPGA partitioning. | Chao, Mango Chia-Tso; Wu, Guang-Ming; Jiang, Iris Hui-Ru; Chang, Yao-Wen; HUI-RU JIANG | Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 1999 | 0 | 0 | |
| 1999 | A clustering- and probability-based approach for time-multiplexed FPGA partitioning. | Chao, Mango Chia-Tso; Wu, Guang-Ming; Jiang, Iris Hui-Ru; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 1999 | 0 | 0 | |
| 2000 | Crosstalk-constrained performance optimization by using wire sizing and perturbation | Pan, Song-Ra; Chang, Yao-Wen; YAO-WEN CHANG | IEEE International Conference on Computer Design: VLSI in Computers and Processors | 13 | | |
| 2000 | Crosstalk-Constrained Performance Optimization by Using Wire Sizing and Perturbation. | Pan, Song-Ra; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000 | 0 | 0 | |
| 2000 | Crosstalk-driven interconnect optimization by simultaneous gate and wire sizing | Jiang, Iris Hui-Ru; Chang, Yao-Wen; Jou, Jing-Yang; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 49 | 39 | |
| 2000 | Crosstalk-driven interconnect optimization by simultaneous gate andwire sizing. | Jiang, Iris Hui-Ru; Chang, Yao-Wen; Jou, Jing-Yang; HUI-RU JIANG | IEEE Trans. on CAD of Integrated Circuits and Systems | 47 | 38 | |
| 2006 | Current path analysis for electrostatic discharge protection. | Liu, Hung-Yi; Lin, Chung-Wei; Chou, Szu-Jui; Tu, Wei-Ting; Liu, Chih-Hung; Chang, Yao-Wen; Kuo, Sy-Yen; CHUNG-WEI LIN | 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006 | 0 | 0 | |
| 2006 | Current path analysis for electrostatic discharge protection. | Liu, Hung-Yi; Lin, Chung-Wei; Chou, Szu-Jui; Tu, Wei-Ting; Liu, Chih-Hung; Chang, Yao-Wen; Kuo, Sy-Yen; SY-YEN KUO | 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006 | 0 | 0 | |
| 2006 | Current path analysis for electrostatic discharge protection. | Liu, Hung-Yi; Lin, Chung-Wei; Chou, Szu-Jui; Tu, Wei-Ting; Liu, Chih-Hung; Chang, Yao-Wen; Kuo, Sy-Yen; YAO-WEN CHANG | 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006 | 0 | 0 | |
| 2019 | A DAG-Based Algorithm for Obstacle-Aware Topology-Matching On-Track Bus Routing. | Hsu, Chen-Hao; Hung, Shao-Chun; Chen, Hao; Sun, Fan-Keng; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019, Las Vegas, NV, USA, June 02-06, 2019 | 0 | 0 | |
| 1995 | Design and analysis of FPGA/FPIC switch modules | Chang, Yao-Wen; Wong, D.F.; Wong, C.K.; YAO-WEN CHANG | IEEE International Conference on Computer Design: VLSI in Computers and Processors | 5 | | |
