公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
1999 | Clustering- and probability-based approach for time-multiplexed FPGA partitioning | Chao, Mango Chia-Tso; Wu, Guang-Ming; Jiang, Iris Hui-Ru; Chang, Yao-Wen; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 17 | | |
2000 | Crosstalk-constrained performance optimization by using wire sizing and perturbation | Pan, Song-Ra; Chang, Yao-Wen; YAO-WEN CHANG | IEEE International Conference on Computer Design: VLSI in Computers and Processors | 13 | | |
2000 | Crosstalk-Constrained Performance Optimization by Using Wire Sizing and Perturbation. | Pan, Song-Ra; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000 | 0 | 0 | |
2000 | Crosstalk-driven interconnect optimization by simultaneous gate andwire sizing. | Jiang, Iris Hui-Ru; Chang, Yao-Wen; YAO-WEN CHANG ; HUI-RU JIANG | IEEE Trans. on CAD of Integrated Circuits and Systems | 49 | 40 | |
2006 | Current path analysis for electrostatic discharge protection. | Liu, Hung-Yi; Lin, Chung-Wei; Chou, Szu-Jui; Tu, Wei-Ting; Liu, Chih-Hung; Chang, Yao-Wen; CHUNG-WEI LIN ; SY-YEN KUO ; YAO-WEN CHANG | 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006 | 0 | 0 | |
2019 | A DAG-Based Algorithm for Obstacle-Aware Topology-Matching On-Track Bus Routing. | Hsu, Chen-Hao; Hung, Shao-Chun; Chen, Hao; Sun, Fan-Keng; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019, Las Vegas, NV, USA, June 02-06, 2019 | 0 | 0 | |
2014 | Design and Implementation of a RESTful Notification Service. | Chang, Yao-Wen; Sheu, Ruey-Kai; Jhu, Syuan-Ru; Chang, Yue-Shan; YAO-WEN CHANG | Intelligent Systems and Applications - Proceedings of the International Computer Symposium (ICS) held at Taichung, Taiwan, December 12-14, 2014 | 0 | 0 | |
2010 | Design of an Omnidirectional Multibeam Transmitter for High-Speed Indoor Wireless Communications. | Tang, Jaw-Luen; Chang, Yao-Wen; YAO-WEN CHANG | EURASIP J. Wireless Comm. and Networking | 3 | 0 | |
2017 | Editorial. | Chakrabarty, Krishnendu; Alioto, Massimo; Baas, Bevan M.; Boon, Chirn Chye; Chang, Meng-Fan; Chang, Naehyuck; Chang, Yao-Wen; Chang, Chip-Hong; Chang, Shih-Chieh; Chen, Poki; Chowdhury, Masud H.; Corsonello, Pasquale; Elfadel, Ibrahim Abe M.; Hamdioui, Said; Hashimoto, Masanori; Ho, Tsung-Yi; Homayoun, Houman; Hwang, Yuh-Shyan; Joshi, Rajiv V.; Karnik, Tanay; Kermani, Mehran Mozaffari; Kim, Chulwoo; Kim, Tae-Hyoung; Kulkarni, Jaydeep P.; Kursun, Eren; Larsson, Erik; Li, Hai (Helen); Li, Huawei; Mercier, Patrick P.; Mishra, Prabhat; Nagata, Makoto; Natarajan, Arun S.; Nii, Koji; Pande, Partha Pratim; Savidis, Ioannis; Seok, Mingoo; Tan, Sheldon X.-D.; Tehranipoor, Mark Mohammad; Todri-Sanial, Aida; Velev, Miroslav N.; Wen, Xiaoqing; Xu, Jiang; Zhang, Wei; Zhang, Zhengya; Jackson, Stacey Weber; YAO-WEN CHANG | IEEE Trans. VLSI Syst. | 0 | 0 | |
2008 | An efficient graph-based algorithm for ESD current path analysis | Liu, Chih-Hung; Liu, Hung-Yi; Lin, Chung-Wei; Chou, Szu-Jui; Chang, Yao-Wen; Kuo, Sy-Yen; Yuan, Shih-Yi; CHUNG-WEI LIN ; CHIH-HUNG LIU ; YAO-WEN CHANG ; SY-YEN KUO | Ieee Transactions on Computer-Aided Design of Integrated Circuits and Systems | 7 | 4 | |
2007 | Efficient obstacle-avoiding rectilinear steiner tree construction. | Lin, Chung-Wei; Chen, Szu-Yu; Li, Chi-Feng; Chang, Yao-Wen; YAO-WEN CHANG ; CHIA-LIN YANG ; CHUNG-WEI LIN | Proceedings of the 2007 International Symposium on Physical Design, ISPD 2007, Austin, Texas, USA, March 18-21, 2007 | 36 | 0 | |
2004 | Efficient power/ground network analysis for power integrity-driven design methodology. | Wu, Su-Wei; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004 | 21 | 0 | |
2012 | An Efficient Pre-assignment Routing Algorithm for Flip-Chip Designs | Lin, Chung-Wei; Lee, Po-Wei; Chang, Yao-Wen; Shen, Chin-Fang; YAO-WEN CHANG ; CHUNG-WEI LIN | Ieee Transactions on Computer-Aided Design of Integrated Circuits and Systems | 16 | 14 | |
2009 | An efficient pre-assignment routing algorithm for flip-chip designs. | Lee, Po-Wei; Lin, Chung-Wei; Chang, Yao-Wen; Shen, Chin-Fang; CHUNG-WEI LIN ; YAO-WEN CHANG | 2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 2009 | 15 | 0 | |
1996 | Fast performance-driven optimization for buffered clock trees based on Lagrangian relaxation | Chen, Chung-Ping; Chang, Yao-Wen; Wong, D.F.; YAO-WEN CHANG | Design Automation Conference | 24 | | |
1996 | Fast Performance-Driven Optimization for Buffered Clock Trees Based on Lagrangian Relaxation. | Chen, Chung-Ping; Chang, Yao-Wen; Wong, D. F.; YAO-WEN CHANG | Proceedings of the 33st Conference on Design Automation, Las Vegas, Nevada, USA, Las Vegas Convention Center, June 3-7, 1996. | 24 | 0 | |
2006 | Floorplan and power/ground network co-synthesis for fast design convergence. | Liu, Chen-Wei; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 2006 International Symposium on Physical Design, ISPD 2006, San Jose, California, USA, April 9-12, 2006 | 22 | 0 | |
2002 | Formulae for Performance Optimization and Their Applications to Interconnect-Driven Floorplanning. | Chang, Nicholas Chia-Yuan; Chang, Yao-Wen; YAO-WEN CHANG ; HUI-RU JIANG | 3rd International Symposium on Quality of Electronic Design, ISQED 2002, San Jose, CA, USA, March 18-21, 2002 | 1 | 0 | |
2007 | Full-Chip Nanometer Routing Techniques. | Ho, Tsung-Yi; Chang, Yao-Wen; Chen, Sao-Jie; YAO-WEN CHANG | | | | |
1999 | Generic universal switch blocks | Shyu, Michael; Chang, Yu-Dong; Wu, Guang-Ming; Chang, Yao-Wen; YAO-WEN CHANG | IEEE International Conference on Computer Design: VLSI in Computers and Processors | 1 | 0 | |