| Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
| 2015 | Identification of a novel platelet antagonist that binds to CLEC-2 and suppresses podoplanin-induced platelet aggregation and cancer metastasis | Chang, Yao-Wen; Hsieh, Pei-Wen; Chang, Yu-Tsui; Lu, Meng-Hong; Huang, Tur-Fu; Chong, Kowit-Yu; Liao, Hsiang-Ruei; Cheng, Ju-Chien; Tseng, Ching-Ping; YAO-WEN CHANG | Oncotarget | | | |
| 2006 | IEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faults. | Li, Katherine Shu-Min; Chang, Yao-Wen; Su, Chauchin; Lee, Chung-Len; Chen, Jwu E.; YAO-WEN CHANG | Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006 | | | |
| 2007 | An ILP algorithm for post-floorplanning voltage-island generation considering power-network planning. | Lee, Wan-Ping; Liu, Hung-Yi; Chang, Yao-Wen; YAO-WEN CHANG | 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007 | | | |
| 2009 | ILP-based pin-count aware design methodology for microfluidic biochips. | Lin, Cliff Chiung-Yu; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009 | | | |
| 2007 | An Integer Linear Programming Based Routing Algorithm for Flip-Chip Design. | Fang, Jia-Wei; Hsu, Chin-Hsiung; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007 | | | |
| 2004 | Integrating buffer planning with floorplanning for simultaneous multi-objective optimization. | Cheng, Yi-Hui; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004 | | | |
| 2017 | An Interview With Professor Chenming Hu, Father of 3D Transistors | Chang, Yao-Wen; Hu, Chenming; YAO-WEN CHANG | Ieee Design & Test | | | |
| 2005 | Joint exploration of architectural and physical design spaces with thermal consideration. | Wu, Yen-Wei; Yang, Chia-Lin; Yuh, Ping-Hung; Chang, Yao-Wen; CHIA-LIN YANG | Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005 | | | |
| 2005 | Joint exploration of architectural and physical design spaces with thermal consideration. | Wu, Yen-Wei; Yang, Chia-Lin; Yuh, Ping-Hung; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005 | | | |
| 2004 | Layout techniques for on-chip interconnect inductance reduction. | Tu, Shang-Wei; Jou, Jing-Yang; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004 | | | |
| 2012 | Material characterization of polycarbonate near glass transition temperature | Chang, Yao-Wen; Cheng, Jung-Ho; YAO-WEN CHANG | Journal of the Chinese Institute of Engineers | | | |
| 1998 | Maximally routable switch matrices for FPD design | Wu, Guang-Min; Chang, Yao-Wen; YAO-WEN CHANG | IEEE International Symposium on Circuits and Systems | | | |
| 2005 | Modern floorplanning based on fast simulated annealing. | Chen, Tung-Chieh; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005 | | | |
| 2007 | MP-trees: A Packing-Based Macro Placement Algorithm for Mixed-Size Designs. | Chen, Tung-Chieh; Yuh, Ping-Hung; Chang, Yao-Wen; Huang, Fwu-Juh; Liu, Denny; YAO-WEN CHANG | Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007 | | | |
| 2003 | Multilevel floorplanning/placement for large-scale modules using B*-trees. | Lee, Hsun-Cheng; Chang, Yao-Wen; Hsu, Jer-Ming; Yang, Hannah Honghua; YAO-WEN CHANG | Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003 | | | |
| 2005 | Multilevel full-chip gridless routing considering optical proximity correction. | Chen, Tai-Chen; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005 | | | |
| 2005 | Multilevel full-chip routing for the X-based architecture. | Ho, Tsung-Yi; Chang, Chen-Feng; Chang, Yao-Wen; Chen, Sao-Jie; YAO-WEN CHANG | Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005 | | | |
| 2005 | Multilevel full-chip routing with testability and yield enhancement. | Li, Katherine Shu-Min; Lee, Chung-Len; Chang, Yao-Wen; Su, Chauchin; Chen, Jwu E.; YAO-WEN CHANG | The Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), San Francisco, CA, USA, April 2-3, 2005, Proceedings | | | |
| 2004 | Multilevel routing with antenna avoidance. | Ho, Tsung-Yi; Chang, Yao-Wen; Chen, Sao-Jie; YAO-WEN CHANG | Proceedings of the 2004 International Symposium on Physical Design, ISPD 2004, Phoenix, Arizona, USA, April 18-21, 2004 | | | |
| 2019 | Multiview Contouring for Breast Tumor on Magnetic Resonance Imaging. | Chen, Dar-Ren; Chang, Yao-Wen; Wu, Hwa-Koon; Shia, Wei-Chung; Huang, Yu-Len; YAO-WEN CHANG | J. Digital Imaging | | | |
