公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2011 | A 172.6mW 43.8GFLOPS energy-efficient scalable eight-core 3D graphics processor for mobile multimedia applications | Chang, C.-M.; Chen, Y.-J.; Lu, Y.-C.; Lin, C.-Y.; Chen, L.-G.; Chien, S.-Y.; LIANG-GEE CHEN ; SHAO-YI CHIEN | IEEE Asian Solid-State Circuits Conference, A-SSCC 2011 | 7 | 0 | |
2015 | A 1920×1080 30fps 611 mW five-view depth-estimation processor for light-field applications | Chen, H.-H.; Huang, C.-T.; Wu, S.-S.; Hung, C.-L.; Ma, T.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE International Solid-State Circuits Conference | 16 | 0 | |
2010 | A 212 MPixels/s 4096 × 2160p multiview video encoder chip for 3D/Quad full HDTV applications | Ding, L.-F.; Chen, W.-Y.; Tsung, P.-K.; Chuang, T.-D.; Hsiao, P.-H.; Chen, Y.-H.; Chiu, H.-K.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN ; SHAO-YI CHIEN | IEEE Journal of Solid-State Circuits | 50 | 40 | |
2008 | A 26mW 6.4GFLOPS multi-core stream processor for mobile multimedia applications | Tsao, Y.-M.; Sun, C.-H.; Lin, Y.-C.; Lok, K.-H.; Hsu, C.-J.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN ; |SHAO-YI CHIEN | IEEE Symposium on VLSI Circuits | 3 | 0 | |
2013 | A 401GFlops/W 16-cores signal reconstruction platform with a 4G entries/s matrix generation engine for compressed sensing and sparse representation | Tsai, Y.-M.; Yang, T.-J.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Symposium on VLSI Circuits | | | |
2006 | A 5mW MPEG4 SP encoder with 2D bandwidth-sharing motion estimation for mobile applications | Lin, C.-P.; Tseng, P.-C.; Chiu, Y.-T.; Lin, S.-S.; Cheng, C.-C.; Fang, H.-C.; Chao, W.-M.; Chen, L.-G.; LIANG-GEE CHEN | IEEE International Solid-State Circuits Conference | | | |
1997 | A bit-level pipelined VLSI architecture for the running order algorithm | Chen, C.-T.; Chen, L.-G.; Hsiao, J.-H.; LIANG-GEE CHEN | IEEE Transactions on Signal Processing | 4 | 2 | |
1998 | A block shifting method for reduction of blocking effects in subband/wavelet image coding | Wu, P.-C.; Chen, L.-G.; Lai, Y.-K.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 1 | 1 | |
2009 | A branch selection multi-symbol high throughput CABAC decoder architecture for H.264/AVC | Lin, P.-C.; Chuang, T.-D.; Chen, L.-G.; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | 16 | 0 | |
2012 | A chip architecture for compressive sensing based detection of IC trojans | Tsai, Y.-M.; Huang, K.-Y.; Kung, H.T.; Vlah, D.; Gwon, Y.L.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 3 | 0 | |
2008 | A cost effective reconfigurable memory for multimedia multithreading streaming architecture | Tsao, Y.-M.; Lok, K.-H.; Lin, Y.-C.; Sun, C.-H.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN ; SHAO-YI CHIEN | IEEE International Symposium on Circuits and Systems | 0 | 0 | |
2001 | A Cost-Effective Design for MPEG-2 Audio Decoder with Embedded RISC Core | Tsai, T.-H.; Wu, R.-J.; Chen, L.-G.; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 0 | 0 | |
2007 | A cost-efficient residual prediction VLSI architecture for H. 264/AVC scalable extension | Chen, Y.-H.; Chuang, T.-D.; Tsai, C.-Y.; Chen, Y.-J.; Chen, L.-G.; LIANG-GEE CHEN | 26th Picture Coding Symposium | | | |
1998 | A data-interlacing architecture with two-dimensional data-reuse for full-search block-matching algorithm | Lai, Y.-K.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 66 | 59 | |
2012 | A depth adaptation system based on perceptual horopter effect | Wu, C.; Li, C.-T.; Lai, Y.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE International Conference on Consumer Electronics | 0 | 0 | |
2002 | A digital signal processor with programmable correlator array architecture for third generation wireless communication system | Chen, C.-K.; Tseng, P.-C.; Chang, Y.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing | 16 | 39 | |
2002 | A fast and high subjective quality sprite generation algorithm with frame skipping and multiple sprites techniques | Chien, S.-Y.; Chen, C.-Y.; Chao, W.-M.; Hsu, C.-W.; Huang, Y.-W.; Chen, L.-G.; LIANG-GEE CHEN | IEEE International Conference on Image Processing | | | |
2012 | A flexible fully hardwired CABAC encoder for UHDTV H.264/AVC high profile video | Tsai, C.-H.; Tang, C.-S.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 16 | 13 | |
2002 | A hardware accelerator for video segmentation using programmable morphology PE array | Chien, S.-Y.; Huang, Y.-W.; Chen, L.-G.; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | | | |
1994 | A High Quality MC-OBTC Codec for Video Signal Processing | Chen, L.-G.; Liu, Y.-C.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 16 | 12 | |