公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
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2015 | Variation-aware core-level redundancy scheme for reliable DSP computation in multi-core systems | Chu, W.-C.; Li, H.-T.; Chou, C.-Y.; Wu, A.-Y.A.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 2 | 0 |