公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
1986 | Test Sequence Generator | Ou, H. C.; 馮武雄; Liaw, H. T.; Feng, Wu-Shiung | Proceedings of 1986 Electron Devices and Materials Symposium | | | |
1986 | Three Layer Routing Algorithms for VLSI Design | 馮武雄; Parng, T. P.; 于惠中; Chen, C. F.; Feng, Wu-Shiung; Yu, Hui-Jung | | | | |
1986 | Top-Down Placement for Hierarchical Layout System | Chang, K. E.; 馮武雄; Feng, Wu-Shiung | 1986 Electron Devices and Materials Symposium, Tainan(1986.08) | | | |
1988 | The Topological Order Determination for Three-Layer Channel Routing Problem | Chang, K. E.; Lai, T. H.; 馮武雄; Feng, Wu-Shiung | Proceedings of International Computer Symposium | | | |
1990 | A Topological Sorting Algorithm for Three-Layer Channel Routing | Chang, K. E.; Lai, T. H.; 馮武雄; Feng, Wu-Shiung | Journal of the Chinese Institute of Engineers | | | |
1991 | Transient sensitivity computation for waveform relaxation-based timing simulation | Chen, Chun-Jung; Shyu, Jyuo-Min; Feng, Wu-Shiung | Computer-Aided Design, 1991. ICCAD-91. Digest of Technical Papers., 1991 IEEE International Conference on | 0 | 0 | |
1991 | Transient Sensitivity Computation for Waveform Relaxation-Based Timing Simulation | Chen, C. J.; 徐爵民; 馮武雄; Shyn, Jyuo-Min; Feng, Wu-Shiung | ICCAD-91: International Conference on Computer-Aided Design, Santa Clara, Ca(1991.11.10-11.14) | | | |
1991 | Transient Sensitivity Computation in Timing Simulation | Chen, C. J.; 馮武雄; Feng, Wu-Shiung | 1991 International Symposium on VLSI Technology, Systems, and Applications, Taipei(1991.05.22) | | | |
1994 | Transient Sensitivity Computation of MOSFEET Circuits Using Iterated Timing Analysis and Selective-tracing Waveform Relaxation | Chen, C. J.; 馮武雄; Feng, Wu-Shiung | The 31th ACM/IEEE Design Automation Conference, San Diego, CA(1994.06) | | | |
1999 | A tree-systolic array of DLMS adaptive filter | Van, Lan-Da; Tenqchen, Shing; Chang, Chia-Hsun; Feng, Wu-Shiung | Acoustics, Speech, and Signal Processing, 1999. ICASSP '99. Proceedings., 1999 IEEE International Conference on | 0 | 0 | |
1987 | Two-Layer Corner-Stitching for Interactive Routing and Pushing of Schematic Editor | Kuop, S. T.; 馮武雄; Feng, Wu-Shiung | Proceedings of 1987 Electron Devices and Materials Symposium | | | |
1989 | Using Hierarchical Multiple Storage Quad Tree on a Constraint-Graph Layout Compaction | Hsiao, P. Y.; 馮武雄; Feng, Wu-Shiung | Journal of the Chinese Institute of Engineers | | | |
1990 | Using Multiple Storage Quad Tree on a Hierarchical VLSI Compaction Scheme | Hsiao, P. Y.; 馮武雄; Feng, Wu-Shiung | IEEE Trans. on Computer-Aided Design | | | |
1990 | Via Minimization with Associated Constraints in Three-Layer Routing Problem | Fang, S. C.; Chang, K. E.; 馮武雄; Feng, Wu-Shiung | 1990 International Symposium on Circuits and Systems | | | |
1990 | Via minimization with associated constraints in three-layer routing problem | Fang, Sung-Chuan; Chang, Kuo-En; Feng, Wu-Shiung | Circuits and Systems, 1990., IEEE International Symposium on | 0 | 0 | |
1998 | Waveform approximation technique in the switch-level timing simulator BTS | Chang, Molin; Chen, Wang-Jin; Wang, Jyh-Herng; Feng, Wu-Shiung | Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on | 0 | 0 | |
1995 | A Waveform-Based Gatelevel Timing Simulator (BTS) for MOS VLSI Circuits with Considerations of Effects of the Internal Charges | Wang, J. H.; Chang, M.; 馮武雄; Feng, Wu-Shiung | Journal of the Chinese Institute of Engineers | | | |
1993 | WBCS - An Accurate and Tableless Current Simulator for CMOS Gates | Fan, J. T.; Wang, J. H.; 馮武雄; Feng, Wu-Shiung | Proceedings of Fourth VLSI Design/CAD Workshop | | | |
1987 | With Multiple Storage Quad Tree on the Constraint Graph Compaction of the VLSI Large-Cell Lay-Out-Editor | Hsiao, P. Y.; 馮武雄; Feng, Wu-Shiung | Proceedings of 1987 Workshop on Computer Vision, Graphics and Image Processing | | | |
2006 | XNOR-Based Double-Edge-Triggered Flip-Flop for
Two-Phase Pipelines | Shu, Ying-Haw; Tenqchen, Shing; Sun, Ming-Chang; Feng, Wu-Shiung | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS | | | |