公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2015 | A dynamic binary translation system in a client/server environment | Hsu, C.-C.; Hong, D.-Y.; Hsu, W.-C.; Liu, P.; WEI-CHUNG HSU ; PANGFENG LIU | Journal of Systems Architecture | 7 | 4 | |
2017 | Dynamic translation of structured loads/stores and register mapping for architectures with SIMD extensions | Fu, S.-Y.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; WEI-CHUNG HSU | Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES) | 4 | 0 | |
2014 | Efficient and retargetable dynamic binary translation on multicores | Hong, D.-Y.; Wu, J.-J.; Yew, P.-C.; Hsu, W.-C.; Hsu, C.-C.; Liu, P.; Wang, C.-M.; WEI-CHUNG HSU ; PANGFENG LIU | IEEE Transactions on Parallel and Distributed Systems | 9 | 7 | |
2018 | Efficient and retargetable SIMD translation in a dynamic binary translator | Fu, S.-Y.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU | Software - Practice and Experience | 4 | 4 | |
2017 | Exploiting Asymmetric SIMD Register Configurations in ARM-to-x86 Dynamic Binary Translation | Liu, Y.-P.; Hong, D.-Y.; Wu, J.-J.; Fu, S.-Y.; WEI-CHUNG HSU | Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT | 7 | 0 | |
2017 | Exploiting longer SIMD lanes in dynamic binary translation | Hong, D.-Y.; Fu, S.-Y.; Liu, Y.-P.; Wu, J.-J.; WEI-CHUNG HSU | Proceedings of the International Conference on Parallel and Distributed Systems - ICPADS | 7 | 0 | |
2019 | Exploiting SIMD asymmetry in Arm-to-X86 dynamic binary translation | Liu, Y.-P.; Hong, D.-Y.; Wu, J.-J.; Fu, S.-Y.; Hsu, W.-C.; WEI-CHUNG HSU | ACM Transactions on Architecture and Code Optimization | 4 | 3 | |
2018 | Improving SIMD parallelism via dynamic binary translation | Hong, D.-Y.; Liu, Y.-P.; Fu, S.-Y.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU | ACM Transactions on Embedded Computing Systems | 10 | 10 | |
2011 | LnQ: Building high performance dynamic binary translators with existing compiler backends | Hsu, C.-C.; Liu, P.; Wang, C.-M.; Wu, J.-J.; Hong, D.-Y.; Yew, P.-C.; WEI-CHUNG HSU ; PANGFENG LIU | International Conference on Parallel Processing | 13 | 0 | |
2015 | Optimizing control transfer and memory virtualization in full system emulators | Hong, D.-Y.; Hsu, C.-C.; Chou, C.-Y.; Hsu, W.-C.; Liu, P.; WEI-CHUNG HSU ; PANGFENG LIU | ACM Transactions on Architecture and Code Optimization | 5 | 2 | |
2019 | Optimizing data permutations in structured loads/stores translation and SIMD register mapping for a cross-ISA dynamic binary translator | Fu, S.-Y.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU | Journal of Systems Architecture | 0 | 0 | |
2019 | Processor-tracing guided region formation in dynamic binary translation | Hong, D.-Y.; Wu, J.-J.; Liu, Y.-P.; Fu, S.-Y.; Hsu, W.-C.; WEI-CHUNG HSU | ACM Transactions on Architecture and Code Optimization | 1 | 0 | |
2016 | SIMD code translation in an enhanced HQEMU | Fu, S.-Y.; Hong, D.-Y.; Wu, J.-J.; Liu, P.; WEI-CHUNG HSU ; PANGFENG LIU | International Conference on Parallel and Distributed Systems | 8 | 0 | |
2018 | Work-in-Progress: Exploiting SIMD Capability in an ARMv7-to-ARMv8 Dynamic Binary Translator | Fu, S.-Y.; Lin, C.-M.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU | 2018 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2018 | 0 | 0 | |