公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2009 | A 900 MHz to 5.2 GHz dual-loop feedback multi-band LNA | Lin, J.-W.; Yen, D.-T.; Hu, W.-Y.; Chu, Y.; Yen, M.-H.; Hsiung, P.-A.; Chen, S.-J.; SAO-JIE CHEN | IEEE International Symposium on Circuits and Systems | 2 | 0 | |
2011 | A low-power 64-point pipeline FFT/IFFT processor for OFDM applications | Yu, C.; Yen, M.-H.; Hsiung, P.-A.; Chen, S.-J.; SAO-JIE CHEN | IEEE Transactions on Consumer Electronics | 59 | 0 | |
2011 | A novel low-power 64-point pipelined FFT/IFFT processor for OFDM applications | Yu, C.; Liao, Y.-T.; Yen, M.-H.; Hsiung, P.-A.; Chen, S.-J.; SAO-JIE CHEN | IEEE International Conference on Consumer Electronics | 9 | 0 | |
2011 | A tiling-scheme Viterbi decoder in Software Defined Radio for GPUs | Lin, C.-S.; Liu, W.-L.; Yeh, W.-T.; Chang, L.-W.; Hwu, W.-M.W.; Chen, S.-J.; Hsiung, P.-A.; SAO-JIE CHEN | 7th International Conference on Wireless Communications, Networking and Mobile Computing, WiCOM 2011 | 17 | 0 | |
2014 | Accelerating coverage estimation through partial model checking | Chen, Y.-R.; Yeh, J.-J.; Hsiung, P.-A.; Chen, S.-J.; SAO-JIE CHEN | IEEE Transactions on Computers | 3 | 3 | |
2010 | ARAL-CR: An adaptive reasoning and learning cognitive radio platform | Chen, S.-J.; Hsiung, P.-A.; Yu, C.; Yen, M.-H.; Sezer, S.; Schulte, M.; Hu, Y.-H.; SAO-JIE CHEN | International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2010 | 3 | 0 | |
2012 | Congestion-aware scheduling for NoC-based reconfigurable systems | Chao, H.-L.; Chen, Y.-R.; Tung, S.-Y.; Hsiung, P.-A.; Chen, S.-J.; SAO-JIE CHEN | Design, Automation and Test in Europe, DATE | | | |
2001 | DESC: A hardware-software codesign methodology for distributed embedded systems | Lee, T.-Y.; Hsiung, P.-A.; Chen, S.-J.; SAO-JIE CHEN | IEICE Transactions on Information and Systems | | | |
2009 | Design of a high-speed bloc k interleaving/deinterleaving architecture for wireless communication applications | Yu, C.; Yen, M.-H.; Hsiung, P.-A.; Chen, S.-J.; SAO-JIE CHEN | IEEE International Conference on Consumer Electronics | 5 | 0 | |
2010 | Design of a low power Viterbi decoder for wireless communication applications | Chen, C.-J.; Yu, C.; Yen, M.-H.; Hsiung, P.-A.; Chen, S.-J.; SAO-JIE CHEN | International Symposium on Consumer Electronics, ISCE | 9 | 0 | |
2007 | Energy efficient co-scheduling in dynamically reconfigurable systems | Hsiung, P.-A.; Lu, P.-H.; Liu, C.-W.; CHIH-WEN LIU | CODES+ISSS 2007: International Conference on Hardware/Software Codesign and System Synthesis | 6 | 0 | |
2007 | Exploiting hardware and software low power techniques for energy efficient co-scheduling in dynamically reconfigurable systems | Hsiung, P.-A.; Liu, C.-W.; CHIH-WEN LIU | 2007 International Conference on Field Programmable Logic and Applications, FPL | 6 | 0 | |
2010 | Formal modeling and verification for Network-on-chip | Chen, Y.-R.; Su, W.-T.; Hsiung, P.-A.; Lan, Y.-C.; Hu, Y.-H.; Chen, S.-J.; SAO-JIE CHEN | 1st International Conference on Green Circuits and Systems, ICGCS 2010 | 18 | 0 | |
2001 | Formal verification of embedded real-time software in component-based application frameworks | Hsiung, P.-A.; See, W.-B.; Lee, T.-Y.; Fu, J.-M.; Chen, S.-J.; SAO-JIE CHEN | Asia-Pacific Software Engineering Conference and International Computer Science Conference, APSEC and ICSC | | | |
2003 | Framework approach for system on chip software development | See, W.-B.; Hsiung, P.-A.; Chen, S.-J.; SAO-JIE CHEN | International Symposium on VLSI Technology, Systems, and Applications | 2 | 0 | |
2000 | Hard ware-software timing co-verification of distributed embedded systems | Jih-Ming, F.U.; Lee Trong-Yen; Hsiung, P.-A.; SAO-JIE CHEN | IEICE Transactions on Information and Systems | 10 | | |
2001 | Hardware-software multi-level partitioning for distributed embedded multiprocessor systems | Lee, T.-Y.; Hsiung, P.-A.; Chen, S.-J.; SAO-JIE CHEN | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | | | |
1998 | ICOS: An intelligent concurrent objectoriented synthesis methodology for multiprocessor systems | Hsiung, P.-A.; Chen, C.-H.; Lee, T.-Y.; SAO-JIE CHEN | ACM Transactions on Design Automation of Electronic Systems | 8 | 0 | |
2016 | Introduction to the special issue on reconfigurable cyber-physical and embedded system design | Hsiung, P.-A.; Kuo, T.-W.; Chang, Y.-H.; Huang, C.-H.; TEI-WEI KUO | Journal of Systems Architecture | 4 | 5 | |
2016 | Introduction to the special issue on smart reconfigurable system modeling, design, and implementation | Hsiung, P.-A.; Chang, Y.-H.; Huang, C.-H.; TEI-WEI KUO | Microprocessors and Microsystems | 0 | 0 | |