Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
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2001 | Synthesis of Partition-codec Architecture for Low Power and Small Area Circuit Design | Shanq-Jang Ruan,; Jen-Chiun Lin,; Po-Hung Chen,; Kun-Lin Tsai,; FEI-PEI LAI | 2001 IEEE International Symposium on Circuits and Systems | 1 | 0 |