公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
1999 | A novel 0.7 V two-port 6T SRAM memory cell structure with single-bit-line simultaneous read-and-write access (SBLSRWA) capability using partially-depleted SOI CMOS dynamic-threshold technique | Liu, S.C.; Kuo, J.B. | SOI Conference, 1999. Proceedings. 1999 IEEE International | 0 | 0 | |
2000 | A novel low-voltage silicon-on-insulator (SOI) CMOS complementary pass-transistor logic (CPL) circuit using asymmetrical dynamic threshold pass-transistor (ADTPT) technique | Wang, Bo-Ting; Kuo, J.B. | Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on | 0 | 0 | |
2000 | A novel two-port 6T CMOS SRAM cell structure for low-voltage VLSI SRAM with single-bit-line simultaneous read-and-write access (SBLSRWA) capability | Wang, B.T.; Kuo, J.B. | Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on | 7 | 0 | |
1991 | A one-transistor synapse circuit with an analog LMS adaptive feedback for neural network VLSI | Lu, T.C.; Chiang, M.L.; Kuo, J.B. | Circuits and Systems, 1991., IEEE International Sympoisum on | 0 | 0 | |
1992 | A radical-partitioned coded block adaptive neural network structure for large-volume Chinese characters recognition | Kuo, J.B.; Mao, M.W.; KuoJB | International Joint Conference on Neural Networks, 1992 IJCNN | 3 | 0 | |
1994 | A radical-partitioned neural network system using a modified Sigmoid function and a weight-dotted radical selector for large-volume Chinese characters recognition VLSI | Kuo, J.B.; Chen, B.Y.; Mao, M.W.; KuoJB | IEEE World Congress on Computational Intelligence | 0 | 0 | |
1991 | Scaling consideration of BiCMOS SRAMs | Tsaur, J.J.; Jih, C.W.; Tsaur, H.W.; Kuo, J.B. | Circuits and Systems, 1991., IEEE International Sympoisum on | 0 | 0 | |
2000 | Short-channel effects of SOI partially-depleted (PD) dynamic-threshold MOS (DTMOS) devices | Lin, S.C.; Yuan, K.H.; Kuo, J.B. | Electron Devices Meeting, 2000. Proceedings. 2000 IEEE Hong Kong | 0 | 0 | |
1995 | SiC vs. Si: two-dimensional analysis of quasi-saturation behavior of DMOS devices operating at elevated temperatures | Chang, Y.W.; Kuo, J.B. | Solid-State and Integrated Circuit Technology, 1995 4th International Conference on | 0 | 0 | |
2000 | SPICE compact modeling of PD-SOI CMOS devices | Kuo, J.B.; KuoJB | Electron Devices Meeting, 2000 IEEE Hong Kong | 0 | 0 | |
1991 | A structured adaptive neural network for pattern recognition VLSI | Kuo, J.B.; Wong, E.J.; Chen, C.C.; Hsiao, C.C.; KuoJB | IEEE International Sympoisum on Circuits and Systems, 1991 | 0 | 0 | |
2019 | Turn-OFF transient analysis of superjunction IGBT | Wang, Z.; Zhang, H.; Kuo, J.B.; JAMES-B KUO | IEEE Transactions on Electron Devices | 7 | 4 | |
1996 | A velocity-overshoot capacitance model for 0.1 μm MOS transistors | Kuo, J.B.; Chang, Y.W.; Lai, C.S.; YAO-WEN CHANG | Solid-State Electronics | 4 | 4 | |