公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2003 | A 40-Gb/s clock and data recovery circuit in 0.18-μm CMOS technology | Lee, J.; Razavi, B.; JRI LEE | IEEE Journal of Solid-State Circuits | 117 | 95 | |
2004 | A 40-GHz Frequency Divider in 0.18-μm CMOS Technology | Lee, J.; Razavi, B.; JRI LEE | IEEE Journal of Solid-State Circuits | 180 | 153 | |
2004 | Analysis and modeling of bang-bang clock and data recovery circuits | Lee, J.; Kundert, K.S.; Razavi, B.; JRI LEE | IEEE Journal of Solid-State Circuits | | | |
2003 | A stabilization technique for phase-locked frequency synthesizers | Lee, T.-C.; Razavi, B.; TAI-CHENG LEE | Phase-Locking in High-Performance Systems: From Devices to Architectures | 0 | 0 | |
2003 | A stabilization technique for phase-locked frequency synthesizers | Lee, T.-C.; Razavi, B.; TAI-CHENG LEE | IEEE Journal of Solid-State Circuits | 52 | 36 | |