公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
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2019 | Effective FPGA Resource Utilization for Quasi Delay Insensitive Implementation of Asynchronous Circuits. | Chang, Yi-Fan Evan; Huang, Ruei-Yang; Jiang, Jie-Hong R.; JIE-HONG JIANG | 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019, Hirosaki, Japan, May 12-15, 2019 | 8 | 0 |