公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
---|---|---|---|---|---|---|
2007 | Multilevel Full-Chip Routing With Testability and Yield Enhancement | Li, Katherine Shu-Min; Chang, Yao-Wen ; Lee, Chung-Len; Su, Chauchin; Chen, Jwu E. | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 5 | ||
2005 | Multilevel full-chip routing with testability and yield enhancement. | Li, Katherine Shu-Min; Lee, Chung-Len; Chang, Yao-Wen; Su, Chauchin; Chen, Jwu E.; YAO-WEN CHANG | The Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), San Francisco, CA, USA, April 2-3, 2005, Proceedings |