| Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
| 2009 | 11.4: A quality-scalable depth-aware video processing system | Cheng, C.-C.; Li, C.-T.; Tsai, Y.-M.; Chen, L.-G.; LIANG-GEE CHEN | Digest of Technical Papers - SID International Symposium | 2 | 0 | |
| 2017 | A 120 fps 1080p resolution block-based feature extraction architecture implementation for real-time action recognition | Yen, C.-T.; Chen, W.-Y.; Chen, L.-G.; LIANG-GEE CHEN | Proceedings - IEEE International Symposium on Circuits and Systems | 0 | 0 | |
| 2007 | 124 MSamples/s pixel-pipelined motion-JPEG 2000 codec without tile memory | Chang, Y.-W.; Cheng, C.-C.; Chen, C.-C.; Fang, H.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 8 | 6 | |
| 2009 | 128-Channel spike sorting processor with a parallel-folding structure in 90nm process | Chen, T.-C.; Liu, W.; Chen, L.-G.; LIANG-GEE CHEN | Proceedings - IEEE International Symposium on Circuits and Systems | 19 | 0 | |
| 2007 | 2.8 to 67.2mW low-power and power-aware H.264 encoder for mobile applications | Chen, T.-C.; Chen, Y.-H.; Tsai, C.-Y.; Tsai, S.-F.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Symposium on VLSI Circuits, Digest of Technical Papers | 27 | 0 | |
| 2007 | 2.8 to 67.2mW low-power and power-aware H.264 encoder for mobile applications | Chen, T.-C.; Chen, Y.-H.; Tsai, C.-Y.; Tsai, S.-F.; Chien, S.-Y.; Chen, L.-G.; SHAO-YI CHIEN | IEEE Symposium on VLSI Circuits | 27 | 0 | |
| 2018 | A 203 FPS VLSI Architecture of Improved Dense Trajectories for Real-Time Human Action Recognition | Lin, Z.-Y.; Chen, J.-L.; Chen, L.-G.; LIANG-GEE CHEN | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings | 0 | 0 | |
| 2016 | 3-D perception enhancement in autostereoscopic TV by depth cue for 3-D model interaction | Shen, Y.-T.; Liu, G.-L.; Wu, S.-S.; Chen, L.-G.; LIANG-GEE CHEN | 2016 IEEE International Conference on Consumer Electronics, ICCE 2016 | 2 | 0 | |
| 2013 | 3D hand localization by low cost webcams | Ko, C.-Y.; Li, C.-T.; Chung, C.-H.; Chen, L.-G.; LIANG-GEE CHEN | Proceedings of SPIE - The International Society for Optical Engineering | 2 | 0 | |
| 2012 | 3D image correction by Hilbert Huang decomposition | Li, C.-T.; Lai, Y.-C.; Wu, C.; Tsai, S.-F.; Chen, L.-G.; LIANG-GEE CHEN | IEEE International Conference on Consumer Electronics | 0 | 0 | |
| 2007 | 3D video applications and intelligent video surveillance camera and its VLSI design | Chien, S.-Y.; Shih, C.-S.; Ku, M.-K.; Yang, C.-L.; Chang, Y.-W.; Kuo, T.-W.; Chen, L.-G.; SHAO-YI CHIEN | 2007 IEEE International Conference on Multimedia and Expo, ICME 2007 | | | |
| 2007 | 3D video applications and intelligent video surveillance camera and its VLSI design | Chien, S.-Y.; Shih, C.-S.; Ku, M.-K.; Yang, C.-L.; Chang, Y.-W.; Kuo, T.-W.; Chen, L.-G.; LIANG-GEE CHEN | 2007 IEEE International Conference on Multimedia and Expo, ICME 2007 | | | |
| 2007 | 3D video applications and intelligent video surveillance camera and its VLSI design | Chien, S.-Y.; Shih, C.-S.; Ku, M.-K.; Yang, C.-L.; Chang, Y.-W.; Kuo, T.-W.; Chen, L.-G.; YAO-WEN CHANG | 2007 IEEE International Conference on Multimedia and Expo, ICME 2007 | 0 | | |
| 2018 | A 473 μw wireless 16-channel neural recording SoC with RF energy harvester | Yeh, K.-Y.; Huang, Y.-J.; Chen, T.-C.; Chen, L.-G.; Lu, S.-S.; LIANG-GEE CHEN | 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018 | 0 | 0 | |
| 2010 | 51.3: An ultra-low-cost 2-D/3-D video-conversion system | Cheng, C.-C.; Li, C.-T.; Chen, L.-G.; LIANG-GEE CHEN | SID International Symposium | | | |
| 2018 | A 65 fps Full-HD Hardware Implementation of HOG, HOF, MBHx, and MBHy for Real-Time Action Recognition | Lin, Z.-Y.; Chen, J.-L.; Chen, L.-G.; LIANG-GEE CHEN | Proceedings - IEEE International Symposium on Circuits and Systems | 0 | 0 | |
| 2006 | 720×480 30fps efficient prediction core chip for stereo video hybrid coding system | Ding, L.-F.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN ; SHAO-YI CHIEN | 2005 IEEE Asian Solid-State Circuits Conference | 1 | 0 | |
| 2003 | 81MS/s JPEG 2000 single-chip encoder with rate-distortion optimization | Fang, H.-C.; Huang, C.-T.; Chang, Y.-W.; Wang, T.-C.; Tseng, P.-C.; Lian, C.-J.; Chen, L.-G.; LIANG-GEE CHEN | IEEE International Solid-State Circuits Conference | | | |
| 2004 | 81MS/s JPEG2000 single-chip encoder with rate-distortion optimization | Fang, H.-C.; Huang, C.-T.; Chang, Y.-W.; Wang, T.-C.; Tseng, P.-C.; Lian, C.-J.; Chen, L.-G.; LIANG-GEE CHEN | IEEE International Solid-State Circuits Conference | | | |
| 2010 | A 0.077 to 0.168 nJ/bit/iteration scalable 3GPP LTE turbo decoder with an adaptive sub-block parallel scheme and an embedded DVFS engine | Cheng, C.-C.; Tsai, Y.-M.; Chen, L.-G.; Ch; rakasan, A.P.; LIANG-GEE CHEN | Custom Integrated Circuits Conference | 7 | 0 | |
