公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2009 | BIST design optimization for large-scale embedded memory cores. | Chien, Tzuo-Fan; Chao, Wen-Chi; Li, James Chien-Mo; Chang, Yao-Wen; Liao, Kuan-Yu; Chang, Ming-Tung; Tsai, Min-Hsiu; CHIEN-MO LI ; YAO-WEN CHANG | 2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 2009 | 7 | 0 | |
2007 | Column Parity Row Selection (CPRS) BIST Diagnosis Technique: Modeling and Analysis | Li, James Chien-Mo; Lin, Hung-Mao; Wang, Fang-Min | IEEE Transactions on Computers | | | |
2007 | Design and Chip Implementation of the Segment Weighted Random BIST for Low Power Testing | Lee, Chun-Yi; Li, James Chien-Mo | Journal of Low Power Electronics | | | |
2004 | A Design for Testability Technique for Low Power Delay Fault Testing | Li, James Chien-Mo | IEICE TRANSACTIONS on Electronics E87-C | | | |
2005 | Diagnosis of Multiple Hold-time and Setup-time Faults in Scan Chains | Li, James Chien-Mo | IEEE Transactions on Computers | | | |
2005 | Diagnosis of Resistive-Open and Stuck-Open Defects in Digital CMOS ICs | Li, James Chien-Mo; McCluskey, Edward J. | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | | | |
2005 | Diagnosis of Single stuck-at Faults and Multiple Timing Faults in Scan Chains | Li, James Chien-Mo | IEEE Transactions on | | | |
2005 | Diagnosis of Timing Faults in Scan Chains Using Single Excitation Patterns | Li, James Chien-Mo | IEICE Transactions on Fundamentals of Electronics | | | |
2008 | Effective and Economic Phase Noise Testing for Single-Chip TV Tuners | Li, James Chien-Mo; Lin, Po-Chou; Chiang, Chih-Ming; Pan, Chuo-Jan; Tseng, Chao-Wen | IEEE Transactions on Instrumentation and Measurement | | | |
2014 | GPU-based timing-aware test generation for small delay defects. | CHIEN-MO LI ; Liao, Kuan-Yu; Chen, Po-Juei; Lin, Ang-Feng; Li, James Chien-Mo; Hsiao, Michael S.; Wang, Laung-Terng; CHIEN-MO LI | 19th IEEE European Test Symposium, ETS 2014, Paderborn, Germany, May 26-30, 2014 | | | |
2018 | A new method for parameter estimation of high-order polynomial-phase signals. | CHIEN-MO LI ; Cao, Runqing; Li, James Chien-Mo; Zuo, Lei; Wang, Zeyu; Lu, Yunlong; CHIEN-MO LI | Signal Processing | | | |
2009 | Very-Low-Voltage Testing of Amorphous Silicon TFT Circuits. | Shen, Shiue-Tsung; Liu, Wei-Hsiao; Ma, En-Hua; Li, James Chien-Mo; I-CHUN CHENG ; CHIEN-MO LI | Proceedings of the Eighteentgh Asian Test Symposium, ATS 2009, 23-26 November 2009, Taichung, Taiwan | 1 | 0 | |
2008 | 一種適用於非同步電路之可測試設計 | 鄭啟玄; Cheng, Chi-Hsuan | | | | |