公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
---|---|---|---|---|---|---|
2016 | Analytic approaches to the collapse operation and equivalence verification of threshold logic circuits | Nian-Ze Lee; Hao-Yuan Kuo; Yi-Hsiang Lai; Jie-Hong R. Jiang; JIE-HONG JIANG ; 江介宏 | International Conference on Computer-Aided Design (ICCAD) | 5 | 0 | |
2017 | Sequential Engineering Change Order under Retiming and Resynthesis | Nian-Ze Lee; Victor Kravets; Jie-Hong R. Jiang; JIE-HONG JIANG ; 江介宏 | International Conference on Computer-Aided Design (ICCAD) | 5 | 0 | |
2017 | Solving Stochastic Boolean Satisfiability under Random-Exist Quantification | Nian-Ze Lee; Yen-Shi Wang; Jie-Hong R. Jiang; JIE-HONG JIANG ; 江介宏 | International Joint Conference on Artificial Intelligence (IJCAI) | 11 | 0 | |
2014 | Towards Formal Evaluation and Verification of Probabilistic Design | Nian-Ze Lee; Jie-Hong R. Jiang; JIE-HONG JIANG | International Conference on Computer- Aided Design (ICCAD) | 4 | 0 | |
2018 | Towards Formal Evaluation and Verification of Probabilistic Design | Nian-Ze Lee; Jie-Hong R. Jiang; JIE-HONG JIANG ; 江介宏 | IEEE Transactions on Computers | 9 | 7 |