Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
2001 | A Bipartition-Codec Architecture to Reduce Power in Pipelined Circuits | Ruan, Shanq-Jang; Shang, Rung-Ji; Lai, Feipei; Tsai, Kun-Lin | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | | | |
1999 | A bipartition-codec architecture to reduce power in pipelined circuits | Ruan, Shanq-Jang; Shang, Rung-Ji; Lai, Feipei; Chen, Shyh-Jong; Huang, Xian-Jun | Computer-Aided Design, 1999. Digest of Technical Papers. 1999 IEEE/ACM International Conference on | 0 | 0 | |
2005 | Bipartitioning and encoding in low-power pipelined circuits | Ruan, Shanq-Jang; Tsai, Kun-Lin; Naroska, Edwin; FEI-PEI LAI | ACM Transactions on Design Automation of Electronic Systems | 4 | 3 | |
2002 | Cache design for eliminating the address translation bottleneck and reducing the tag area cost | Chang, Yen-Jen; Lai, Feipei; Ruan, Shanq-Jang | Computer Design: VLSI in Computers and Processors, 2002. Proceedings. 2002 IEEE International Conference on | 0 | 0 | |
2004 | Circuit Partition and Reordering Technique for Low Power IP | Tsai, Kun-Lin; Ruan, Shanq-Jang; Huang, Chun-Ming; Naroska, Edwin; Lai, Feipei | IEICE Trans. On Electronics E87-C | | | |
2023 | Comparative effects of kinect-based versus therapist-based constraint-induced movement therapy on motor control and daily motor function in children with unilateral cerebral palsy: a randomized control trial | Shih, Tsai-Yu; TIEN-NI WANG ; JENG-YI SHIEH ; Lin, Szu-Yu; Ruan, Shanq-Jang; Tang, Hsien-Hui; HAO-LING CHEN | Journal of neuroengineering and rehabilitation | 2 | 1 | |
2003 | Design and Analysis of Low Power Cache using Two-Level Filter Scheme | Chang, Yen-Jen; Ruan, Shanq-Jang; Lai, Feipei | IEEE Transactions on | | | |
2000 | An effective output-oriented algorithm for low power multipartition architecture | Ruan, Shanq-Jang; Lin, Jen-Chiun; Chen, Po-Hung; Lai, Feipei; Tsai, Kun-Lin; FEI-PEI LAI | Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on | 6 | 0 | |
2002 | Energy Analysis of Bipartition Architecture for Pipelined Circuits | Ruan, Shanq-Jang; Naroska, Edwin; Chang, Yen-Ren; Ho, Chia-Lin; FEI-PEI LAI | IEEE Asia Pacific Conference on Circuits and Systems | 0 | 0 | |
2002 | ENPCO: An Entropy-Based Partition-Codec Algorithm to Reduce Power for bipartition-codec architecture in Pipelined Circuits | Ruan, Shanq-Jang; Naroska, Edwin; Chang, Yen-Jen; Lai, Feipei; Schwiegelshohn, Uwe | IEEE Transactions on | | | |
2001 | An entropy-based algorithm to reduce area overhead for bipartition-codec architecture | Chen, Po-Hung; Ruan, Shanq-Jang; Wu, Kuen-Pin; Hu, Dai-Xun; Lai, Feipei; Tsai, Kun-Lin | Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on | 2 | 0 | |
2001 | Hierarchical Access Control Using the Secure Filter | Wu, Kuen-Pin; Ruan, Shanq-Jang; Tseng, Chih-Kuang; Lai, Feipei | IEICE Trans. on Information & Systems E84-D | | | |
2005 | Low Power Dynamic Bus Encoding for Deep Sub-micron Design | Tsai, Kun-Lin; Ruan, Shanq-Jang; Chen, Li-Wei; Lai Feipei; Naroska, Edwin | The 3rd International IEEE Northeast Workshop on Circuits & Systems, June 19-22 | | | |
2006 | Low Power Scheduling Method using Multiple Supply Voltages | Tsai, Kun-Lin; Lee, Ju-Yueh; Ruan, Shanq-Jang; Lai, Feipei | IEEE International Symposium on Circuits and Systems, Island of Kos, Greece, May 21-24 | | | |
2000 | On key distribution in secure multicasting | Wu, Kuen-Pin; Ruan, Shanq-Jang; Lai, Feipei; Tseng, Chih-Kuang | Local Computer Networks, 2000. LCN 2000. Proceedings. 25th Annual IEEE Conference on | 0 | 0 | |
2005 | Optimal Permutation and Spacing for Unbiased Random, Counter, and Instruction Address Buses | Naroska, Edwin; Ruan, Shanq-Jang; Uwe Schwiegelshohn; FEI-PEI LAI | International IEEE Northeast Workshop on Circuits & Systems | | | |