| Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
| 2019 | First Demonstration of CMOS Inverter and 6T-SRAM Based on GAA CFETs Structure for 3D-IC Applications | Chang, S.-W.; Li, J.-H.; Huang, M.-K.; Huang, Y.-C.; Huang, S.-T.; Wang, H.-C.; Huang, Y.-J.; Wang, J.-Y.; Yu, L.-W.; Huang, Y.-F.; Hsueh, F.-K.; Sung, P.-J.; Wu, C.-T.; Ma, W.C.-Y.; Kao, K.-H.; Lee, Y.-J.; Lin, C.-L.; Chuang, R.W.; Huang, K.-P.; Samukawa, S.; Li, Y.; Lee, W.-H.; Chu, T.-Y.; Chao, T.-S.; Huang, G.-W.; Wu, W.-F.; Li, J.-Y.; Shieh, J.-M.; Yeh, W.-K.; Wang, Y.-H.; Lu, D.D.; Wang, C.-J.; Lin, N.-C.; Su, C.-J.; Lo, S.-H.; Huang, H.-F.; JIUN-YUN LI | Technical Digest - International Electron Devices Meeting, IEDM | 28 | 0 | |
| 2017 | High performance complementary Ge peaking FinFETs by room temperature neutral beam oxidation for sub-7 nm technology node applications | Lee, Y.-J.; Hong, T.-C.; Hsueh, F.-K.; Sung, P.-J.; Chen, C.-Y.; Chuang, S.-S.; Cho, T.-C.; Noda, S.; Tsou, Y.-C.; Kao, K.-H.; Wu, C.-T.; Yu, T.-Y.; Jian, Y.-L.; Su, C.-J.; Huang, Y.-M.; Huang, W.-H.; Chen, B.-Y.; Chen, M.-C.; Huang, K.-P.; Li, J.-Y.; Chen, M.-J.; Li, Y.; Samukawa, S.; Wu, W.-F.; Huang, G.-W.; Shieh, J.-M.; Tseng, T.-Y.; Chao, T.-S.; Wang, Y.-H.; MIIN-JANG CHEN ; JIUN-YUN LI | Technical Digest - International Electron Devices Meeting, IEDM | 7 | 0 | |
| 2017 | High performance complementary Ge peaking FinFETs by room temperature neutral beam oxidation for sub-7 nm technology node applications | Lee, Y.-J.; Hong, T.-C.; Hsueh, F.-K.; Sung, P.-J.; Chen, C.-Y.; Chuang, S.-S.; Cho, T.-C.; Noda, S.; Tsou, Y.-C.; Kao, K.-H.; Wu, C.-T.; Yu, T.-Y.; Jian, Y.-L.; Su, C.-J.; Huang, Y.-M.; Huang, W.-H.; Chen, B.-Y.; Chen, M.-C.; Huang, K.-P.; Li, J.-Y.; Chen, M.-J.; Li, Y.; Samukawa, S.; Wu, W.-F.; Huang, G.-W.; Shieh, J.-M.; Tseng, T.-Y.; Chao, T.-S.; Wang, Y.-H.; Yeh, W.-K.; JIUN-YUN LI | Technical Digest - International Electron Devices Meeting, IEDM | 7 | 0 | |
| 2019 | Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications | Sung, P.-J.; Chang, C.-Y.; Chen, L.-Y.; Kao, K.-H.; Su, C.-J.; Liao, T.-H.; Fang, C.-C.; Wang, C.-J.; Hong, T.-C.; Jao, C.-Y.; Hsu, H.-S.; Luo, S.-X.; Wang, Y.-S.; Huang, H.-F.; Li, J.-H.; Huang, Y.-C.; Hsueh, F.-K.; Wu, C.-T.; Huang, Y.-M.; Hou, F.-J.; Luo, G.-L.; Huang, Y.-C.; Shen, Y.-L.; Ma, W.C.-Y.; Huang, K.-P.; Lin, K.-L.; Samukawa, S.; Li, Y.; Huang, G.-W.; Lee, Y.-J.; Li, J.-Y.; Wu, W.-F.; Shieh, J.-M.; Chao, T.-S.; Yeh, W.-K.; Wang, Y.-H.; JIUN-YUN LI | Technical Digest - International Electron Devices Meeting, IEDM | 5 | 0 | |
