公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
---|---|---|---|---|---|---|
2012 | A 0.25V 460nW Asynchronous Neural Signal Processor with Inherent Leakage Suppression | T.-T. Liu; J. Rabaey; TSUNG-TE LIU | IEEE Symposium on VLSI Circuits | |||
2016 | Dynamic Reconfigurable Ternary Content Addressable Memory for OpenFlow-Compliant Low-Power Packet Processing | T.-S. Chen; D.-Y. Lee; T.-T. Liu; A.-Y. Wu; TSUNG-TE LIU | IEEE Transactions on Circuits and Systems I: Regular Papers | 21 | ||
2012 | Statistical Analysis and Optimization of Asynchronous Circuits | T.-T. Liu; J. Rabaey; TSUNG-TE LIU | 18th IEEE International Symposium on Asynchronous Circuits and Systems, (ASYNC'12) | |||
2013 | TEASE: A Systematic Analysis Framework for Early Evaluation of FinFET-based Advanced Technology Nodes | A. Mallik; P. Zuber; T.-T. Liu; B. Chava; B. Ballal; P. Royer; K. Croes; B. Rogier; R. Julien; A. Mercha; M. Badaroglu; D. Verkest; TSUNG-TE LIU | 50th ACM/EDAC/IEEE Design Automation Conference (DAC’13) |