公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2004 | A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator | Liu, Tsung-Te ; Wang, Chorng-Kuang | 30th European Solid-State Circuits Conference, 2004. ESSCIRC 2004 | 0 | 0 | |
2004 | A 1.8V 2.5-5.2 GHz CMOS dual-input two-stage ring VCO | Tu, Wei-Hsuan; Yeh, Jyh-Yih; Tsai, Hung-Chieh; Wang, Chorng-Kuang | Advanced System Integrated Circuits 2004 | 0 | 0 | |
2004 | A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier | Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng ; Wang, Chorng-Kuang | 2004 International Symposium on Circuits and Systems, 2004. ISCAS '04 | | | |
2004 | A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier. | Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang; TAI-CHENG LEE | Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004 | | | |
2004 | A 14 GHz DLL based low-jitter multi-phase clock generator for low-band ultra-wideband application | Liu, Tsung-Te ; Wang, Chorng-Kuang | Advanced System Integrated Circuits 2004 | 0 | 0 | |
1999 | A 2 V CMOS programmable pipelined digital differential matched filter for DS-CDMA system | Yen, She-Hwa; Wang, Chorng-Kuang | ASICs, 1999. AP-ASIC '99. The First IEEE Asia Pacific Conference on | 6 | 0 | |
2000 | A 2-V 10.7MHz CMOS Limiting Amplifier/RSSI | Huang, Po-Chiun; Chen, Yi-Huei; 汪重光; Wang, Chorng-Kuang | Proceedings of the 11th VLSI/CAD Symposium | | | |
2000 | A 2-V 10.7MHz CMOS Limiting Amplifier/RSSI | Huang, Po-Chiun; Chen, Yi-Huei; 汪重光; Wang, Chorng-Kuang | IEEE Journal of Solid-state Circuits | | | |
1999 | A 2-V 7.2?a Jitter AM-Suppression CMOS Amplifier using Current-Mode Hybrid Magnitude Control | Huang, Kuang-Hu; Wang, Wei-Cheng; Yang, Tang-Huei; 汪重光; Wang, Chorng-Kuang | IEEE Journal of Solid-state Circuits | | | |
2001 | A 2-V CMOS 455KHz FM/FSK Demodulator using Feedforward Offset Cancellation Limiting Amplifier | Huang, Po-Chiun; Chen, Yi-Huei; 汪重光; Wang, Chorng-Kuang | IEEE Journal of Solid-state Circuits | | | |
2000 | A 2-V CMOS 455kHz FM/FSK demodulator using feedforward offset cancellation limiting amplifier | Huang, Po-Chiun; Chen, Yi-Huei; Liu, Chien-Chih; Wang, Chorng-Kuang | ASICs, 2000. AP-ASIC 2000. Proceedings of the Second IEEE Asia Pacific Conference on | 0 | 0 | |
1998 | A 2V 7.2 Degree Jitter AM-Suppression CMOS Amplifier Using Current-Mode Hybrid Magnitude Control | 汪重光; Huang, Kuang-Hu; Yang, Tang-Huei; Tien-Long Deng; Wang, Chorng-Kuang | IEEE International Solid-State Circuit Conference, San Francisco, CA(1998.02) | | | |
1999 | A 2V CMOS Dual-Bandwidth Fast Acquisition Automatic Gain Control Amplifier for Digital Cable Modem | Huang, Kuang-Hu; Shiue, Muh-Tian; 汪重光; Wang, Chorng-Kuang | IEEE AP-ASIC, Seoul, Korea(1999.08) | | | |
1999 | A 2V CMOS Programable Pipelined Digital Differential Matched Filter for DS-CDMA System | Yen, Shyh-Hua; 汪重光; Wang, Chorng-Kuang | IEEE AP-ASIC, Seoul, Korea(1999.08) | | | |
2004 | A 3.1-10.6 GHz CMOS cascaded two-stage distributed amplifier for ultra-wideband application | Chen, Kuan-Hung; Wang, Chorng-Kuang | Advanced System Integrated Circuits 2004 | 0 | 0 | |
1998 | A 3.3-V CMOS Wideband Exponential Control Variable-Gain-Amplifier | Huang, Po-Chiun; Li-Yu Chiou; 汪重光; Wang, Chorng-Kuang | Proceedings of the 1998 IEEE International Symposium on Circuits and Systems | | | |
2002 | A 5.8-GHz two-stage high-linearity low-voltage low noise amplifier in a 0.35-/spl mu/m CMOS technology | Liu, Ren-Chieh; Lee, Chung-Rung; Wang, Huei; Wang, Chorng-Kuang | Radio Frequency Integrated Circuits (RFIC) Symposium, 2002 IEEE | 0 | 0 | |
2009 | A 60-GHz phased array receiver front-end in 0.13-?m CMOS technology | Wang, Chao-Shiun; Huang, Juin-Wei; Chu, Kun-Da; Wang, Chorng-Kuang | IEEE Transactions on Circuits and Systems I: Regular Papers | | | |
2011 | A fully-integrated cantilever based DNA detection SoC in a CMOS Bio-MEMS Process | Huang, Yu-Jie; Huang, Che-Wei; Lin, Tsung-Hsien ; Lin, Chih-Ting ; Chen, Li-Guang; Hsiao, Po-Yun; Wu, Bi-Ru; Hsueh, Hsiao-Ting; Kuo, Bing-Jye; Tsai, Hann-Huei; Liao, Hsin-Hao; Juang, Ying-Zong; Wang, Chorng-Kuang; Lu, Shey-Shi | 2011 IEEE Symposium on VLSI Technology | | | |
2002 | All digital CDMA upstream transmitter and baseband VLSI design of head-end receiver for upstream cable networks | Su, Keng-Yi; Shieu, Muh-Tain; Wang, Chorng-Kuang | ASIC, 2002. Proceedings. 2002 IEEE Asia-Pacific Conference on | 0 | 0 | |