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Issue DateTitleAuthor(s)SourcescopusWOSFulltext/Archive link
12000Automatic router for the pin grid array packageChen, S.-S.; Chen, J.-J.; Tsai, C.-C.; Chen, S.-J.; SAO-JIE CHEN IEE Proceedings: Computers and Digital Techniques 72
21994General area router based on planning techniquesChen, S.-J.; Tsai, C.-C.; Chen, Y.-L.; Hu, Y.-H.; SAO-JIE CHEN IEE Proceedings: Computers and Digital Techniques 00
32006Real-time realisation of noise-immune gradient-based edge detectorHsiao, P.-Y.; Chen, C.-H.; Wen, H.; Chen, S.-J.; SAO-JIE CHEN IEE Proceedings: Computers and Digital Techniques 127
42004Simultaneous routing and buffering in SOC floorplan designFang, J.P.; Tong, Y.-S.; Chen, S.J.; SAO-JIE CHEN IEE Proceedings: Computers and Digital Techniques 55