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Results 1-20 of 21 (Search time: 0.088 seconds).

Issue DateTitleAuthor(s)SourcescopusWOSFulltext/Archive link
12009A commitment-based management strategy for the performance and reliability enhancement of flash-memory storage systemsChang, Y.-H.; Kuo, T.-W.; TEI-WEI KUO Design Automation Conference 
22011A fault-tolerant NoC scheme using bidirectional channelTsai, W.-C.; Zheng, D.-Y.; Chen, S.-J.; Hu, Y.-H.; SAO-JIE CHEN Design Automation Conference 
32016A semantics-aware design for mounting remote sensors on mobile systemsJong, Y.-W.; Hsiu, P.-C.; Cheng, S.-W.; Kuo, T.-W.; TEI-WEI KUO Design Automation Conference 50
42011A version-based strategy for reliability enhancement of flash file systemsHsu, P.-H.; Chang, Y.-H.; Huang, P.-C.; Kuo, T.-W.; Du, D.H.-C.; TEI-WEI KUO Design Automation Conference 
52015Achieving SLC performance with MLC flash memoryChang, Y.-M.; Chang, Y.-H.; Kuo, T.-W.; Li, Y.-C.; Li, H.-P.; TEI-WEI KUO Design Automation Conference 110
62012Age-based PCM wear leveling with nearly zero search costChen, C.-H.; Hsiu, P.-C.; Kuo, T.-W.; Yang, C.-L.; Wang, C.-Y.M.; TEI-WEI KUO ; CHIA-LIN YANG Design Automation Conference 790
72014Computation offloading by using timing unreliable components in real-time systemsLiu, W.; Chen, J.-J.; Toma, A.; Kuo, T.-W.; Deng, Q.; TEI-WEI KUO Design Automation Conference 170
81991Constrained Via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing ProblemsFang, S. C.; Chang, K. E.; 馮武雄; 陳少傑 ; Chang, K. E.; Feng, Wu-Shiung; Chen, Sao-Jie Design Automation Conference 
92013DuraCache: A durable SSD cache using MLC NAND flashLiu, R.-S.; Yang, C.-L.; Li, C.-H.; Chen, G.-Y.; CHIA-LIN YANG Design Automation Conference 300
102014EC-Cache: Exploiting error locality to optimize ldpc in NAND flash-based SSDSLiu, R.-S.; Chuang, M.-Y.; Yang, C.-L.; Li, C.-H.; Ho, K.-C.; Li, H.-P.; CHIA-LIN YANG Design Automation Conference 160
112007Endurance enhancement of flash-memory storage systems: An efficient static wear leveling designChang, Y.-H.; Hsieh, J.-W.; Kuo, T.-W.; TEI-WEI KUO Design Automation Conference 1990
122012GPU-Based Massively Parallel N-Detect Transition Delay Fault ATPG,K. Y. Liao; S. C. Hsu; J. C. M. Li; CHIEN-MO LI Design Automation Conference 110
132008iVisual: An intelligent visual sensor SoC with 2790fps CMOS image sensor and 205GOPS/W vision processorCheng, C.-C.; Lin, C.-H.; Li, C.-T.; Chang, S.C.; Chen, L.-G.; LIANG-GEE CHEN Design Automation Conference 80
142012Joint management of RAM and flash memory with access pattern considerationsHuang, P.-C.; Chang, Y.-H.; Kuo, T.-W.; TEI-WEI KUO Design Automation Conference 110
152005Multilevel full-chip routing for the X-based architectureHo, Tsung-Yi; Chang, Chen-Feng; Chang, Yao-Wen ; Chen, Sao-Jie Design Automation Conference 
162014On trading wear-leveling with heal-levelingChang, Y.-M.; Chang, Y.-H.; Chen, J.-J.; Kuo, T.-W.; Li, H.-P.; Lue, H.-T.; TEI-WEI KUO Design Automation Conference 170
172009Thermal-driven analog placement considering device matchingLin, P.-H.; Zhang, H.; Wong, M.D.F.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference 24
182012Timing ECO optimization using metal-configurable gate-array spare cellsChang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference 40
192017Toward Optimal Legalization for Mixed-Cell-Height Circuit DesignsChen, J.; Zhu, Z.; Zhu, W.; Chang, Y.-W. Design Automation Conference 300
202011TSV-aware analytical placement for 3D IC designsHsu, M.-K.; Chang, Y.-W.; Balabanov, V.; YAO-WEN CHANG Design Automation Conference 72