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Issue DateTitleAuthor(s)SourcescopusWOSFulltext/Archive link
12013A Low-Cost Error Tolerance Scheme for 3-D CMOS ImagersH.-M. Chang; J.-L. Huang; D.-M. Kwai; K.-T. Cheng; C.-W. Wu; JIUN-LANG HUANG IEEE Transactions on Very Large Scale Integration 54
22011ADC/DAC Loopback Linearity Testing by DAC Output Offsetting and ScalingX.-L. Huang; J.-L. Huang; JIUN-LANG HUANG IEEE Transactions on Very Large Scale Integration 1511