第 1 到 210 筆結果,共 210 筆。
公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 | |
---|---|---|---|---|---|---|---|
1 | 1999 | IP design of a reconfigurable baseline JPEG coding | Chang, Hao-Chieh; Chen, Li-Lin; Lian, Chung-Jr; Chang, Yung-Chi; LIANG-GEE CHEN | AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs | 4 | 0 | |
2 | 1999 | 數位視訊的傳輸、壓縮與系統設計(III)-子計畫二 高效能視訊壓縮系統及架構設計 | 陳良基 | ||||
3 | 1999 | 低功率可攜式多媒體助理之相關技術研究─子計畫二:低功率視訊解碼器晶片設計(III) | 陳良基 | ||||
4 | 1999 | Low power full-search block-matching motion estimation chip for H.263+ | Shen, Jun-Fu; Chen, Liang-Gee ; Chang, Hao-Chieh; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 1999. ISCAS '99 | 0 | 0 | |
5 | 1999 | A novel image compression algorithm by using Log-Exp transform | Huang, Sheng-Chieh; Chen, Liang-Gee ; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 1999, ISCAS '99 | 0 | 0 | |
6 | 1999 | An efficient architecture for two-dimensional discrete wavelet transform | Wu, Po-Cheng; Chen, Liang-Gee | International Symposium on VLSI Technology, Systems, and Applications, 1999 | 0 | 0 | |
7 | 1999 | A VLSI architecture design of VLC encoder for high data rate video/image coding | Chang, Hao-Chieh; Chen, Liang-Gee ; Chang, Yung-Chi; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 1999, ISCAS '99 | 0 | 0 | |
8 | 1999 | A single chip CMOS APS camera with direct frame difference output | Ma, Shyh-Yih; Chen, Liang-Gee | Custom Integrated Circuits Conference, 1999. | 0 | 0 | |
9 | 1999 | Efficient modeling architecture for real-time content-based arithmetic coding | Chang, Hao-Chieh; Chen, Liang-Gee; LIANG-GEE CHEN | Proceedings of SPIE - The International Society for Optical Engineering | 0 | 0 | |
10 | 1999 | LOG-EXP still image compression chip design | Huang, Sheng-Chieh; Chen, Liang-Gee; LIANG-GEE CHEN | IEEE International Conference on Consumer Electronics | 0 | 0 | |
11 | 1999 | Novel image compression algorithm by using LOG-EXP transform | Huang, Sheng-Chieh; Chen, Liang-Gee; Chang, Hao-Chieh; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
12 | 1999 | VLSI architecture design of VLC encoder for high data rate video/image coding | Chang, Hao-Chieh; Chen, Liang-Gee; Chang, Yung-Chi; Huang, Sheng-Chieh; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
13 | 1999 | A LOG-EXP still image compression chip design | Huang, S.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 3 | 2 | |
14 | 1999 | Single-chip CMOS APS camera with direct frame difference output | Ma, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Journal of Solid-State Circuits | 63 | 53 | |
15 | 1999 | Single chip CMOS APS camera with direct frame difference output | Ma, Shyh-Yih; Chen, Liang-Gee; LIANG-GEE CHEN | Custom Integrated Circuits Conference | |||
16 | 1999 | ─低功率可攜式多媒體助理之相關技術研究-總計畫(III) | 陳良基 | ||||
17 | 1999 | Efficient architecture for two-dimensional discrete wavelet transform | Wu, Po-Cheng; Chen, Liang-Gee; LIANG-GEE CHEN | International Symposium on VLSI Technology, Systems, and Applications | |||
18 | 1999 | Cost-effective design for MPEG2 audio decoder with embedded RISC core | Tsai, Tsung-Han; Chen, Liang-Gee; Wu, Ren-Jr; LIANG-GEE CHEN | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 0 | 0 | |
19 | 1999 | System level integration methodology for MPEG-2 audio decoder with embedded RISC core | Tsai, Tsung-Han; Chen, Liang-Gee; Wu, Ren-Jr.; LIANG-GEE CHEN | International Symposium on VLSI Technology, Systems, and Applications | |||
20 | 1999 | Low power strategy about correlator array for CDMA baseband processor | Ku, Chung-Wei; Kuo, Fu-Yen; Chen, Chi-Kuang; Chen, Liang-Gee; LIANG-GEE CHEN | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
21 | 1999 | Low power full-search block-matching motion estimation chip for H.263+ | Shen, Jun-Fu; Chen, Liang-Gee; Chang, Hao-Chieh; Wang, Tu-Chih; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
22 | 1999 | Cost effective architecture design of inverse quantization and multichannel processing for MPEG-2 audio decoding | Tsai, Tsung-Han; Chen, Liang-Gee; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | 0 | 0 | |
23 | 1998 | A simple and low-cost MPEG audio degrouping algorithm | Tsai, Tsung-Han; Chen, Liang-Gee ; Wu, Ren-Jr | 1998 Fourth International Conference on Signal Processing, ICSP '98 | 0 | 0 | |
24 | 1998 | Design and implementation of low-power DCT chip for portable multimedia terminals | Chen, Liang-Gee ; Jiu, Juing-Ying; Chang, Hao-Chieh | IEEE Workshop on Signal Processing Systems, 1998. SIPS 98 | 0 | 0 | |
25 | 1998 | 低功率可攜式多媒體助理之相關技術研究(II) -子計畫一展頻無線傳輸接收機晶片組研製 | 陳良基 | ||||
26 | 1998 | 低功率可攜式多媒體助理之相關技術研究(I)-子計畫二 低功率視訊解碼器晶片設計 | 陳良基 | ||||
27 | 1998 | A low-cost architecture design with efficient data arrangement and memory configuration for MPEG-2 audio decoder | Tsai, Tsung-Han; Chen, Liang-Gee ; Huang, Sheng-Chieh; Chang, Hao-Chieh | IEEE International Symposium on Circuits and Systems, 1998. ISCAS '98 | 0 | 0 | |
28 | 1998 | Low power 2D DCT chip design for wireless multimedia terminals | Chen, Liang-Gee ; Jiu, Juing-Ying; Chang, Hao-Chieh; Lee, Yung-Pin; Ku, Chung-Wei | IEEE International Symposium on Circuits and Systems, 1998. ISCAS '98 | 0 | 0 | |
29 | 1998 | Using a region-based blurring method and bits reallocation to enhance quality on face region in very low bitrate video | Chen, Chang-Hong; Chen, Liang-Gee ; Chang, Hao-Chieh | IEEE International Symposium on Circuits and Systems, 1998, ISCAS '98 | 0 | 0 | |
30 | 1998 | An adaptive network control scheme for region-based hybrid coding algorithm | Chen, Hsu-Teng; Chen, Liang-Gee ; Huang, Sheng-Chieh; Tsai, Tsung-Han; Chang, Hao-Chieh | 1998 IEEE International Symposium on Circuits and Systems, 1998. ISCAS '98 | 0 | 0 | |
31 | 1998 | A modified MPEG-2 audio decoding scheme based on its low-cost fast algorithm and efficient data scheduling | Tsai, Tsung-Han; Chen, Liang-Gee ; Chang, Hao-Chieh; Huang, Sheng-Chieh | IEEE International Symposium on Circuits and Systems, 1998. ISCAS '98 | 0 | 0 | |
32 | 1998 | A low power 2D DCT chip design using direct 2D algorithm | Chen, Liang-Gee ; Jiu, Juing-Ying; Chang, Hao-Chieh; Lee, Yung-Pin; LIANG-GEE CHEN | Design Automation Conference 1998 | 0 | 0 | |
33 | 1998 | Design and implementation of low power DCT chip for portable multimedia terminals | Chen, Liang-Gee; Jiu, Juing-Ying; Chang, Hao-Chieh; LIANG-GEE CHEN | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
34 | 1998 | VLSI implementation of the motion estimator with two-dimensional data-reuse | Lai, Y.-K.; Lai, Y.-L.; Liu, Y.-C.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 5 | 5 | |
35 | 1998 | A block shifting method for reduction of blocking effects in subband/wavelet image coding | Wu, P.-C.; Chen, L.-G.; Lai, Y.-K.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 1 | 1 | |
36 | 1998 | 3C整合科技與前瞻規劃國外研討會及合作洽商 | 陳良基 | ||||
37 | 1998 | 寬頻遠距教學系統在醫學通識教育之應用 | 陳恆順; 陳晶瑩; 郭斐然; 林家青; 陳良基 ; 李明濱; 陳慶餘 | 醫學教育 | |||
38 | 1998 | A data-interlacing architecture with two-dimensional data-reuse for full-search block-matching algorithm | Lai, Y.-K.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 66 | 59 | |
39 | 1998 | Modified MPEG-2 audio decoding scheme based on it's low-cost fast algorithm and efficient data scheduling | Tsai, Tsung-Han; Chen, Liang-Gee; Chang, Hao-Chieh; Huang, Sheng-Chieh; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
40 | 1998 | Low power 2-D DCT chip design using direct 2-D algorithm | Chen, Liang-Gee; Jiu, Juing-Ying; Chang, Hao-Chieh; Lee, Yung-Pin; Ku, Chung-Wei; LIANG-GEE CHEN | Asia and South Pacific Design Automation Conference, ASP-DAC | |||
41 | 1998 | Using a region-based blurring method and bits reallocation to enhance quality on face region in very low bitrate video | Chen, Chang-Hong; Chen, Liang-Gee; Chang, Hao-Chieh; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
42 | 1998 | Simple and low-cost MPEG audio degrouping algorithm | Tsai, Tsung-Han; Chen, Liang-Gee; Wu, Ren-Jr; LIANG-GEE CHEN | International Conference on Signal Processing, ICSP | |||
43 | 1998 | Low-cost architecture design with efficient data arrangement and memory configuration for MPEG-2 audio decoder | Tsai, Tsung-Han; Chen, Liang-Gee; Huang, Sheng-Chieh; Chang, Hao-Chieh; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
44 | 1998 | VLSI implementation of visual block pattern truncation coding | Liu, Y.-C.; Lai, Y.-K.; Tsai, T.-H.; Wu, P.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 1 | 1 | |
45 | 1998 | Multimedia visual telephone system | Chen, L.-G.; Ku, C.-W.; LIANG-GEE CHEN | Multimedia Technology for Applications | 0 | 0 | |
46 | 1998 | A novel MPEG audio degrouping algorithm and its architecture design | Tsai, T.-H.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Signal Processing | |||
47 | 1998 | 寬頻遠距教學系統在醫學通識教育之應用 | 陳恆順(Heng-Shuen Chen); 陳晶瑩(Jing-Ying Chen); 郭斐然(Fei-Ran Guo); 林家青(Chia-Chin Chen); 陳良基(Liang-Gee Chen); 李明濱(Ming-Been Lee); 陳慶餘(Ching-Yu Chen); LIANG-GEE CHEN | 醫學教育 | |||
48 | 1998 | Adaptive network control scheme for region-based hybrid coding algorithm | Chen, Hsu-Tung; Chen, Liang-Gee; Huang, Sheng-Chieh; Tsai, Tsung-Han; Chang, Hao-Chieh; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
49 | 1998 | Low power 2D DCT chip design for wireless multimedia terminals | Chen, Liang-Gee; Jiu, Juing-Ying; Chang, Hao-Chieh; Lee, Yung-Pin; Ku, Chung-Wei; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
50 | 1997 | Implementation strategy of MPEG-2 audio decoder and efficient multichannel architecture | Tsai, Tsung-Han; Chen, Liang-Gee ; Chen, Ruei-Xi | 1997 IEEE Workshop on Signal Processing Systems, SIPS 97 | 0 | 0 | |
51 | 1997 | The system implementation of I-phone hardware by using low bit rate speech coding | Chen, Ruei-Xi; Chen, Mei-Juan; Chen, Liang-Gee ; Tsai, Tsung-Han | Signal Processing Systems, SIPS 97 | 0 | 0 | |
52 | 1997 | A flexible data-interlacing architecture for full-search block-matching algorithm | Lai, Yeong-Kang; Chen, Liang-Gee ; LIANG-GEE CHEN | IEEE International Conference on Application-Specific Systems, Architectures and Processors, 1997 | 0 | 0 | |
53 | 1997 | An efficient array architecture with data-rings for 3-step hierarchical search block matching algorithm | Lai, Yeong-Kang; Chen, Liang-Gee ; Shen, Jun-Fu | Circuits and Systems, 1997. ISCAS '97. | 0 | 0 | |
54 | 1997 | Hardware efficient design of filter banks for video coding | Wu, Po-Cheng; Chen, Liang-Gee ; Liu, Yuan-Chen; Lai, Yeong-Kang | Circuits and Systems, 1997. ISCAS '97. | 0 | 0 | |
55 | 1997 | A novel scalable architecture with memory interleaving organization for full search block-matching algorithm | Lai, Yeong-Kang; Chen, Liang-Gee ; Tsai, Tsung-Han; Wu, Po-Cheng | IEEE International Symposium on Circuits and Systems, 1997, ISCAS '97 | 0 | 0 | |
56 | 1997 | A cost-effective architecture for 8 × 8 two-dimensional DCT/IDCT using direct method | Lee, Y.-P.; Chen, T.-H.; LIANG-GEE CHEN ; Chen, M.-J.; Ku, C.-W. | IEEE Transactions on Circuits and Systems for Video Technology | 80 | 0 | |
57 | 1997 | Efficient hierarchical motion estimation algorithm based on visual pattern block segmentation | Chen, Mei-Juan; Chen, Liang-Gee; Weng, Ro-Min; Lee, Yung-Pin; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
58 | 1997 | A bit-level pipelined VLSI architecture for the running order algorithm | Chen, C.-T.; Chen, L.-G.; Hsiao, J.-H.; LIANG-GEE CHEN | IEEE Transactions on Signal Processing | 4 | 2 | |
59 | 1997 | Efficient array architecture with data-rings for 3-step hierarchical search block matching algorithm | Lai, Yeong-Kang; Chen, Liang-Gee; Shen, Jun-Fu; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
60 | 1997 | Flexible high-throughput VLSI architecture with 2-D data-reuse for full-search motion estimation | La, Yeong-Kang; Chen, Liang-Gee; Tsai, Tsung-Han; Wu, Po-Cheng; LIANG-GEE CHEN | IEEE International Conference on Image Processing | |||
61 | 1997 | 低功率可攜式多媒體助理之相關技術研究 (I)─子計畫二:低功率視訊解碼器晶片設計 | 陳良基 | ||||
62 | 1997 | Flexible data-interlacing architecture for full-search block-matching algorithm | Lai, Yeong-Kang; Chen, Liang-Gee; Lee, Yung-Pin; LIANG-GEE CHEN | International Conference on Application-Specific Systems, Architectures and Processors | |||
63 | 1997 | 低功率可攜式多媒體助理之相關技術研究─低功率可攜式多媒體助理之相關技術研究 I (總計畫) | 陳良基 | ||||
64 | 1997 | Error concealment of lost motion vectors with overlapped motion compensation | Chen, M.-J.; Chen, L.-G.; Weng, R.-M.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 123 | 100 | |
65 | 1997 | True color video signal processing system and its real-time chip implementation | Liu, Yuan-Chen; Chen, Liang-Gee; Wu, Po-Cheng; Lai, Yeong-Kang; Tsai, Tsung-Han; Lee, Yung-Pin; LIANG-GEE CHEN | IEEE International Conference on Consumer Electronics | |||
66 | 1997 | Error Resilience for Block Loss with Overlapped Motion Compensation. | Chen, Mei-Juan; Chen, Liang-Gee; Chen, Ruei-Xi; LIANG-GEE CHEN | Proceedings 1997 International Conference on Image Processing, ICIP '97, Santa Barbara, California, USA, October 26-29, 1997 | 0 | 0 | |
67 | 1997 | Novel scalable architecture with memory interleaving organization for full search block-matching algorithm | Lai; Yeong-Kang; Chen; Liang-Gee; Tsai; Tsung-Han; Wu; Po-Cheng; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
68 | 1997 | A novel MPEG-2 audio decoder with efficient data arrangement and memory configuration | Tsai, T.-H.; Chen, L.-G.; Liu, Y.-C.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 10 | 0 | |
69 | 1997 | Architecture design of motion estimation for ITU-T H.263 | Ku, C.-W.; Lin, G.-S.; Chen, L.-G.; Lee, Y.-P.; LIANG-GEE CHEN | Proceedings of SPIE - The International Society for Optical Engineering | 1 | 0 | |
70 | 1997 | 數位視訊的傳輸、壓縮與系統設計(I)─子計畫四:極高壓縮比比例調整式影像編碼系統之發展與實現 | 陳良基 | ||||
71 | 1997 | Implementation strategy of MPEG-2 audio decoder and efficient multichannel architecture | Tsai, Tsung-Han; Chen, Liang-Gee; Chen, Ruei-Xi; LIANG-GEE CHEN | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
72 | 1997 | An I-phone system design and implementation with a portable speech coding coprocessor | Chen, R.-X.; Chen, L.-G.; Chen, M.-J.; Tsai, T.-H.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 1 | 1 | |
73 | 1997 | Hardware efficient design of filter banks for video coding | Wu, Po-Cheng; Chen, Liang-Gee; Liu, Yuan-Chen; Lai, Yeong-Kang; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
74 | 1997 | Jointly Optimal Region-Classified Adaptive Vector Quantization for Very Low Bit Rate Video Coding. | Chen, Yee-Wen; Chen, Liang-Gee; Chen, Mei-Juan; LIANG-GEE CHEN | VLSI Signal Processing | 0 | 4 | |
75 | 1997 | Error resilience for block loss with overlapped motion compensation | Chen, Mei-Juan; Chen, Liang-Gee; Chen, Ruei-Xi; LIANG-GEE CHEN | IEEE International Conference on Image Processing | |||
76 | 1997 | 專用於影像/視訊傳輸之處理器架構及IC電路設計(II) | 陳良基 | ||||
77 | 1997 | System implementation of I-phone hardware by using low bit rate speech coding | Chen, Ruei-Xi; Chen, Mei-Juan; Chen, Liang-Gee; Tsai, Tsung-Han; LIANG-GEE CHEN | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
78 | 1997 | Jointly Optimal Region-Classified Adaptive Vector Quantization for Very Low Bit Rate Video Coding | Chen; Y.-W.; Chen; L.-G.; M.-J.; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | |||
79 | 1997 | Low-power low-voltage direct digital frequency synthesizer | Liao, Shyuan; Chen, Liang-Gee; LIANG-GEE CHEN | International Symposium on VLSI Technology, Systems, and Applications | |||
80 | 1996 | Design strategy for three-dimensional subband filter banks | Wu, Po-Cheng; Chen, Liang-Gee ; Lai, Yeong-Kang; LIANG-GEE CHEN | International Conference on Image Processing, 1996 | 0 | 0 | |
81 | 1996 | A self-adjusting weighted median filter for removing impulse noise in images | Chen, Chun-Te; LIANG-GEE CHEN | International Conference on Image Processing, 1996 | 0 | 0 | |
82 | 1996 | A pseudo-object-oriented very low bit-rate video coding system with cache VQ for detail compensation | Ku, Chung-Wei; Chen, Liang-Gee ; Chiu, You-Ming; LIANG-GEE CHEN | International Conference on Image Processing, 1996 | 0 | 0 | |
83 | 1996 | Efficient hybrid tree/linear array architectures for block-matching motion estimation algorithms | MIIN-JANG CHEN ; LIANG-GEE CHEN ; Cheng, K.-N.; Chen, M.C. | IEE Proceedings: Vision, Image and Signal Processing | 5 | 4 | |
84 | 1996 | An efficient visual pattern block truncation coding | Chen, Liang-Gee ; Liu, Yuan-Chen | International Symposium on Circuits and Systems, 1996. ISCAS '96 | 0 | 0 | |
85 | 1996 | Building a pseudo object-oriented very low bit-rate video coding system from a modified optical flow motion estimation algorithm | Ku, Chung-Wei; Chiu, You-Ming; LIANG-GEE CHEN ; Yung-Pin Lee | International Conference on Acoustics, Speech, and Signal Processing, 1996. ICASSP-96 | 0 | 0 | |
86 | 1996 | A novel video signal processor with reconfigurable pipelined architecture | Lai, Yeong-Kang; Chen, Liang-Gee ; Chiang, Ming-Cheng | IEEE International Symposium on Circuits and Systems, 1996, ISCAS '96 | 0 | 0 | |
87 | 1996 | A very low bit rate video coding system using adaptive region-classified vector quantization | Chen, Yee-Wen; LIANG-GEE CHEN ; Mei-Juan Chen | IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP-96 | 0 | 0 | |
88 | 1996 | The arbitrarily shaped transform of segmented motion field for a pseudo object-oriented very low bit-rate video coding system | Ku, Chung-Wei; Chiu, You-Ming; Chen, Liang-Gee ; Lee, Yung-Pin | IEEE International Symposium on Circuits and Systems, 1996. ISCAS '96 | 0 | 0 | |
89 | 1996 | Novel video signal processor with programmable data arrangement and efficient memory configuration | Lai, Yeong-Kang; Chen, Liang-Gee; LIANG-GEE CHEN | IEEE International Conference on Consumer Electronics | |||
90 | 1996 | Three-step search motion estimation chip for MPEG-2 applications | Chiu, You-Ming; Chen, Liang-Gee; Lee, Yung-Ping; Ku, Chung-Wei; LIANG-GEE CHEN | Proceedings of SPIE - The International Society for Optical Engineering | |||
91 | 1996 | 高效能智慧型電腦輸出入系統之晶片設計─高效能智慧型輸出入系統之晶片設計-子計畫二:高效能視訊解碼系統 I | 陳良基 | ||||
92 | 1996 | Ic design of an adaptive viterbi decoder | Chan, M.-H.; Lee, W.-T.; Lin, M.-C.; LIANG-GEE CHEN ; MAO-CHAO LIN | IEEE Transactions on Consumer Electronics | 25 | 18 | |
93 | 1996 | New design and implementation of 8×8 2-D DCT/IDCT | Lee, Y.-P.; Chen, L.-G.; Chen, M.-J.; Ku, Ch.-W.; LIANG-GEE CHEN | IEEE Workshop on VLSI Signal Processing | |||
94 | 1996 | Multimedia video conference system: using region base hybrid coding | Chen, Hsu-Tung; Chen, Liang-Gee; LIANG-GEE CHEN | IEEE International Conference on Consumer Electronics | |||
95 | 1996 | Efficient visual pattern block truncation coding | Chen, Liang-Gee; Liu, Yuan-Chen; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
96 | 1996 | 高畫質視訊處理研究(V)─高畫質電視訊號處理研究子計畫四:高品質視訊壓縮及傳輸之開發研究(V) | 陳良基 | ||||
97 | 1996 | A 32-bit logarithmic number system processor | Huang, S.-C.; LIANG-GEE CHEN ; Chen, T.-H. | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 5 | 5 | |
98 | 1996 | Scalable implementation scheme for multirate FIR filters and its application in efficient design of subband filter banks | Wu, P.-C.; Chen, L.-G.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 1 | 0 | |
99 | 1996 | Investigation of a visual telephone prototyping on personal computers | Ku, C.-W.; Chen, L.-G.; Chen, C.-H.; Jiu, J.-Y.; Huang, C.-T.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 1 | 1 | |
100 | 1996 | Vlsi implementation of a selective median filter | Chen, C.-T.; Chen, L.-G.; Hsiao, J.-H.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 28 | 25 | |
101 | 1996 | Design strategy for three-dimensional subband filter banks | Wu, Po-Cheng; Chen, Liang-Gee; Lai, Yeong-Kang; Tsai, Tsung-Han; LIANG-GEE CHEN | IEEE International Conference on Image Processing | |||
102 | 1996 | A multimedia video conference system: Using region base hybrid coding | Chen, H.-T.; Wu, P.-C.; Lai, Y.-K.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 12 | 11 | |
103 | 1996 | Arbitrarily shaped transform of segmented motion field for a pseudo object-oriented very low bit-rate video coding system | Ku, Chung-Wei; Chiu, You-Ming; Chen, Liang-Gee; Lee, Yung-Pin; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
104 | 1996 | 專用於影像/視訊傳輸之處理器架構及積體電路設計 | 陳良基 | ||||
105 | 1996 | Novel architecture for Lempel-Ziv-Based data compression | Chen, Chun-Te; Chen, Liang-Gee; LIANG-GEE CHEN | IEEE International Conference on Consumer Electronics | |||
106 | 1996 | Very low bit rate video coding system using adaptive region-classified vector quantization | Chen, Yee-Wen; Chen, Liang-Gee; Chen, Mei-Juan; LIANG-GEE CHEN | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | |||
107 | 1996 | Pseudo object-oriented very low bit-rate video coding system with cache VQ for detail compensation | Ku, Chung-Wei; Chen, Liang-Gee; Chiu, You-Ming; Lee, Yung-Pin; LIANG-GEE CHEN | IEEE International Conference on Image Processing | |||
108 | 1996 | A novel video signal processor with programmable data arrangement and efficient memory configuration | Lai, Y.-K.; Chen, L.-G.; Chen, H.-T.; Chen, M.-J.; Lee, Y.-P.; Wu, P.-C.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 4 | 5 | |
109 | 1996 | Self-adjusting weighted median filter for removing impulse noise in images | Chen, Chun-Te; Chen, Liang-Gee; LIANG-GEE CHEN | IEEE International Conference on Image Processing | |||
110 | 1996 | Novel video signal processor with reconfigurable pipelined architecture | Lai, Yeong-Kang; Chen, Liang-Gee; Chiang, Ming-Cheng; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
111 | 1995 | Scalable implementation scheme for multirate FIR filters and its application in efficient design of subband filter banks | Chen, Liang-Gee ; Wu, Po-Cheng; Chiueh, Tzi-Dar | VLSI Signal Processing | 0 | 0 | |
112 | 1995 | A hardware-oriented design for weighted median filters | Chen, Chun-Te; Chen, Liang-Gee ; Hsiao, Jue-Hsuan | Asian and South Pacific Design Automation Conference, IFIP International Conference on Hardware Description Languages and IFIP International Conference on Very Large Scale Integration, ASP-DAC '95/CHDL '95/VLSI '95 | 0 | 0 | |
113 | 1995 | VLSI architecture for radix-2k Viterbi decoding with transpose algorithm | Lee, Wen-Ta; Chen, Thou-Ho; LIANG-GEE CHEN | International Symposium on VLSI Technology, Systems, and Applications, Proceedings | 1 | 0 | |
114 | 1995 | Design and VLSI implementation of MPEG audio decoder | Tsai, Tsung-Han; Chen, Thou-Ho; LIANG-GEE CHEN | International Symposium on VLSI Technology, Systems, and Applications, Proceedings | 0 | 0 | |
115 | 1995 | Hardware-oriented design for weighted median filters | Chen, Chun-Te; Chen, Liang-Gee; Hsiao, Jue-Hsuan; LIANG-GEE CHEN | Asia and South Pacific Design Automation Conference, ASP-DAC | |||
116 | 1995 | VLSI-based array dividers with concurrent error detection | Chen, T.-H.; Lee, Y.-P.; LIANG-GEE CHEN | International Journal of Electronics | 0 | 0 | |
117 | 1995 | 高效能智慧型電腦輸出入系統之晶片設計─高效能智慧型輸出入系統之晶片設計:子計畫二-高效能視訊輸出系統 | 陳良基 | ||||
118 | 1995 | 高畫質電視訊號處理研究(IV)─高畫質電視訊號處理研究子計畫四:高畫質影像傳輸系統設計及演算法之研究(4/5) | 陳良基 | ||||
119 | 1995 | High Throughput CORDIC-Based Systolic Array Design for the Discrete Cosine Transform | Hsiao, J.-H.; Cher, L.-G.; Chiueh, T.-D.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 26 | 24 | |
120 | 1995 | An MPEG audio decoder chip | Tsai, T.-H.; LIANG-GEE CHEN ; Chen, T.-H. | IEEE Transactions on Consumer Electronics | 16 | 16 | |
121 | 1995 | Very low bit rate video coding system based on optical flow and region segmentation algorithms | Ku, Chung-Wei; Chen, Liang-Gee; Chiu, You-Ming; LIANG-GEE CHEN | Proceedings of SPIE - The International Society for Optical Engineering | |||
122 | 1995 | Architecture design of MPEG-2 decoder system | Lee, Yung-Pin; Chen, Liang-Gee; Ku, Chung-Wei; LIANG-GEE CHEN | IEEE International Conference on Consumer Electronics | |||
123 | 1995 | A New Block-Matching Criterion for Motion Estimation and its Implementation | Chen, M.-J.; Chen, L.-G.; Chiueh, T.-D.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 74 | 56 | |
124 | 1995 | Pipeline interleaving design for FIR, IIR, and FFT array processors | Chen, L.-G.; Jehng, Y.-S.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | Journal of VLSI Signal Processing | 0 | 0 | |
125 | 1995 | A hardware-oriented design for weighted median filters. | Chen, Chun-Te; Chen, Liang-Gee; Hsiao, Jue-Hsuan; LIANG-GEE CHEN | Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29 - September 1, 1995 | 0 | 0 | |
126 | 1995 | A single-chip viterbi decoder for a binary convolutional code using an adaptive algorithm | Lee, W.-T.; Chan, M.-H.; Chen, L.-G.; LIANG-GEE CHEN ; MAO-CHAO LIN | IEEE Transactions on Consumer Electronics | 4 | 2 | |
127 | 1994 | Object-oriented video coding algorithm for very low bit-rate system | Chen, Liang-Gee ; Chiu, You-Ming; Chiueh, Tzi-Dar ; Jong, Her-Ming | IEEE Asia-Pacific Conference on Circuits and Systems, 1994. APCCAS '94 | 0 | 0 | |
128 | 1994 | Design and VLSI implementation of real-time weighted median filters | Chen, Chun-Te; Chen, Liang-Gee ; Chiueh, Tzi-Dar ; Hsiao, Jue-Hsuan | IEEE Asia-Pacific Conference on Circuits and Systems, 1994. APCCAS '94 | 0 | 0 | |
129 | 1994 | Radix-2k Viterbi decoding with transpose path metric processor | Lee, Wen-Ta; Chen, Thou-Ho; LIANG-GEE CHEN | IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings | 0 | 0 | |
130 | 1994 | High throughput CORDIC-based systolic array design for the discrete cosine transform | Hsiao, Jue-Hsuan; Chen, Liang-Gee ; Chiueh, Tzi-Dar ; LIANG-GEE CHEN | 1994 IEEE International Symposium on Circuits and Systems, 1994. ISCAS '94., | 0 | 0 | |
131 | 1994 | Parallel architectures of 3-step search block-matching algorithm for video coding | Jong, Her-Ming; Chen, Liang-Gee ; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 1994. ISCAS '94 | 0 | 0 | |
132 | 1994 | Tree-structure architecture and VLSI implementation for vector quantization algorithms | Ku, Chung-Wei; Chen, Liang-Gee ; Chiueh, Tzi-Dar ; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, ISCAS '94 | 0 | 0 | |
133 | 1994 | The Chip design of A 32-b logarithmic number system | Huang, Sheng-Chieh; LIANG-GEE CHEN ; Chen Thou-Ho | Proceedings - IEEE International Symposium on Circuits and Systems | 8 | 0 | |
134 | 1994 | Modifications and performance improvements of 3-step search block-matching algorithm for video coding | Jong, Her-Ming; LIANG-GEE CHEN ; TZI-DAR CHIUEH | ISSIPNN 1994 - 1994 International Symposium on Speech, Image Processing and Neural Networks, Proceedings | 0 | 0 | |
135 | 1994 | A High Quality MC-OBTC Codec for Video Signal Processing | Chen, L.-G.; Liu, Y.-C.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 16 | 12 | |
136 | 1994 | 超大型積體電路電腦輔助設計系統-子計畫四 | 陳良基 | ||||
137 | 1994 | 超大型積體電路電腦網路輔助設計系統-子計畫四: 高品質音頻訊號壓縮電路設計與開發研究 | 陳良基 | ||||
138 | 1994 | 高畫質訊號處理研究(III)子計劃三:高畫質電視之高速影像壓縮架構設計研究 | 陳良基 | ||||
139 | 1994 | One-Dimensional Full Search Motion Estimation Algorithm For Video Coding | Chen, M.-J.; Chiueh, T.-D.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 119 | 140 | |
140 | 1994 | Application-specific chip design using behavioral silicon compiler | Chen, Liang-Gee; Jeng, Lih-Gwo; Lin, Dong-Jye; LIANG-GEE CHEN | Journal of the Chinese Institute of Engineers, Transactions of the Chinese Institute of Engineers, Series A/Chung-kuo Kung Ch'eng Hsuch K'an | 0 | 0 | |
141 | 1994 | Design and VLSI implementation of real-time weighted median filters | Chen, Chun-Te; Chen, Liang-Gee; Chiueh, Tzi-Dar; Hsiao, Jue-Hsuan; LIANG-GEE CHEN | IEEE Asia-Pacific Conference on Circuits and Systems | |||
142 | 1994 | 高畫質訊號處理研究(III)子計畫三:高畫質電視之高速影像壓縮架構設計研究 | 闕志達 ; 陳良基 | ||||
143 | 1994 | Parallel Architectures for 3-Step Hierarchical Search Block-Matching Algorithm | Jong, H.-M.; Chen, L.-G.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 115 | 96 | |
144 | 1994 | Vector Quantization Using Tree-Structured Self-Organizing Feature Maps | Chiueh, T.-D.; Tang, T.-T.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Journal on Selected Areas in Communications | 15 | 9 | |
145 | 1994 | Tree-structure architecture and VLSI implementation for vector quantization algorithms | Ku, Chung-Wei; Chen, Liang-Gee; Chiueh, Tzi-Dar; Jong, Her-Ming; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
146 | 1994 | 超大型積體電路電腦輔助設計系統I-1:視訊處理系統 | 陳良基 | ||||
147 | 1994 | Parallel architectures of 3-step search block-matching algorithm for video coding | Jong, Her-Ming; Chen, Liang-Gee; Chiueh, Tzi-Dar; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
148 | 1994 | Object-oriented video coding algorithm for very low bit-rate system | Chen, Liang-Gee; Chiu, You-Ming; Chiueh, Tzi-Dar; Jong, Her-Ming; LIANG-GEE CHEN | IEEE Asia-Pacific Conference on Circuits and Systems | |||
149 | 1994 | Rate-Optimal DSP Synthesis by Pipeline and Minimum Unfolding | Jeng, L.-G.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 13 | 0 | |
150 | 1994 | High throughput CORDIC-based systolic array design for the discrete cosine transform | Hsiao, Jue-Hsuan; Chen, Liang-Gee; Chiueh, Tzi-Dar; Chen, Chun-Te; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
151 | 1994 | Accuracy Improvement and Cost Reduction of 3-Step Search Block Matching Algorithm for Video Coding | Jong, H.-M.; Chen, L.-G.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 61 | 54 | |
152 | 1993 | Hardware verification using symbolic state transition graphs | Chen, Pin-hong; Shyu, Jyuo-Min; LIANG-GEE CHEN | 1993 IEEE International Conference on Computer Design: VLSI in Computers and Processors | 0 | 0 | |
153 | 1993 | Cache vector quantisation algorithm in video compression | Ku, C.-W.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | Electronics Letters | 0 | 0 | |
154 | 1993 | Novel systolic array design for the discrete Hartley transform with high throughput rate | Hsiao, Jue-Husan; Chen, Liang-Gee ; Chiueh, Tzi-Dar ; Chen, Chun-Te | IEEE International Symposium on Circuits and Systems, 1993, ISCAS '93 | 0 | 0 | |
155 | 1993 | 一種減少狀態數腓特比解碼器的積體電路設計(II) | 陳良基 ; 林茂昭 | ||||
156 | 1993 | 高畫質訊號處理研究子計畫六:高解析度電視之高速影像壓縮電路設計與開發研究 | 陳良基 | ||||
157 | 1993 | 超大型積體電路電腦輔助設計系統(I)-總計畫 | 陳良基 ; 林呈祥; 楊武純; 賴飛羆 ; Lai, Fei-Pei | ||||
158 | 1993 | 超大型積體電路電腦輔助設計系統(I)子計畫一:視訊處理系統之高階合成研究 | 陳良基 | ||||
159 | 1993 | MPC-台北多計劃晶片(II) | Chen, Liang-Gee | ||||
160 | 1993 | 超級電腦之研究發展(總計劃) | 龐台銘; 郭德盛; 顏嗣鈞 ; 陳良基 ; 雷欽隆(Lei, Chin-Laung); 賴飛羆_TTS.TITLE; Chen, Liang-Gee | ||||
161 | 1993 | Concurrent Error-Detectable Butterfly Chip for Real-Time FFT Processing Through Time Redundancy | Chen, T.-H.; LIANG-GEE CHEN | IEEE Journal of Solid-State Circuits | 8 | 6 | |
162 | 1993 | An Efficient and Simple VLSI Tree Architecture for Motion Estimation Algorithms | Jehng, Y.-S.; Chen, L.-G.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Signal Processing | 109 | 82 | |
163 | 1993 | Rate-Optimal DSP Synthesis by Pipeline and Minimum Undolding. | Jeng, Lih-Gwo; Chen, Liang-Gee; LIANG-GEE CHEN | Proceedings of the Sixth International Conference on VLSI Design, VLSI Design 1993, Bombay, India, January 3-6, 1993 | 0 | 0 | |
164 | 1993 | A Real-Time Video Signal Processing Chip | Chen, L.-G.; Liu, Y.-C.; Chiueh, T.-D.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Consumer Electronics | 9 | 10 | |
165 | 1993 | Hardware verification using symbolic state transition graphs | Chen, Pinhong; Shyu, Jyuo-Min; Chen, Liang-Gee; LIANG-GEE CHEN | IEEE International Conference on Computer Design: VLSI in Computers and Processors | |||
166 | 1993 | Novel systolic array design for the Discrete Hartley Transform with high throughput rate | Hsiao, Jue-Husan; Chen, Liang-Gee; Chiueh, Tzi-Dar; Chen, Chun-Te; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
167 | 1993 | Intelligent digital filter synthesis system | Chen, L.-G.; Chao, C.-T.; LIANG-GEE CHEN | Journal of the Chinese Institute of Engineers, Transactions of the Chinese Institute of Engineers,Series A/Chung-kuo Kung Ch'eng Hsuch K'an | 0 | 0 | |
168 | 1992 | Design of concurrent error-detectable VLSI-based array dividers | Chen, Thou-Ho; Chen, Liang-Gee ; LIANG-GEE CHEN | IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1992. ICCD '92 | 0 | 0 | |
169 | 1992 | Realization of array architectures for video compression algorithms | Jehng, Yeu-Shen; LIANG-GEE CHEN ; TZI-DAR CHIUEH ; Chen, Thou-Ho | Proceedings - IEEE International Symposium on Circuits and Systems | 2 | 0 | |
170 | 1992 | ROM-based special purpose multiplication and its applications | Jong, H.-M.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | Electronics Letters | 0 | ||
171 | 1992 | A partitioning approach to design fault-tolerant arithmetic arrays | Chen, Thou-Ho; LIANG-GEE CHEN ; Jehng, Yeu-Shen | 11th Annual International Phoenix Conference on Computers and Communication, IPCCC 1992 - Proceedings | 2 | 0 | |
172 | 1992 | Design and analysis of VLSI-based arithmetic arrays with error correction | Chen, T.-H.; LIANG-GEE CHEN ; Jehng, Y.-S. | International Journal of Electronics | 4 | 2 | |
173 | 1992 | Automatic synthesizer for CMOS operational amplifiers | Kuo, Chin-Yuan; Chen, Liang-Gee; Parng, Tai-Ming; LIANG-GEE CHEN | European Conference on Design Automation | |||
174 | 1992 | Rate-optimal static scheduling for recursive DSP algorithms by retiming and unfolding | Jeng, L.-G.; Chen, L.-G.; LIANG-GEE CHEN | International Journal of Electronics | 1 | 0 | |
175 | 1992 | 高畫質訊號處理研究群體計畫子題(4):高速影像壓縮電路設計與開發研究 | 陳良基 ; 楊武純; 闕志達 ; Chiueh, Tzi-Dar | ||||
176 | 1992 | Language system for DSP silicon compiler | Chen, Liang-Gee; Jeng, Lih-Gwo; Tsao, Ki-Tsan; LIANG-GEE CHEN | Proceedings of the National Science Council, Republic of China, Part A: Physical Science and Engineering | |||
177 | 1992 | A motion estimator for low bit-rate video codec | Jehng, Y.-S.; Chen, L.-G.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Consumer Electronics | 9 | 7 | |
178 | 1992 | DCT-based interframe coding for video codec | Jong, H.-M.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | Electronics Letters | 0 | 0 | |
179 | 1991 | A predictive parallel motion estimation algorithm for digital image processing | Chen, Liang-Gee ; Chen, Wai-Ting; Jehng, Ten-Shen; LIANG-GEE CHEN | IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1991. ICCD '91 | 0 | 0 | |
180 | 1991 | Fault-tolerant serial-parallel multiplier | LIANG-GEE CHEN ; Chen, T.H. | IEE Proceedings E: Computers and Digital Techniques | 5 | 4 | |
181 | 1991 | Optimal module set and clock cycle selection for DSP synthesis | Chen, Liang-Gee ; Jeng, Lih-Gwo | IEEE International Sympoisum on Circuits and Systems, 1991 | 0 | 0 | |
182 | 1991 | A concurrent error-detectable module design for FFT processing | LIANG-GEE CHEN ; Chen, Thou-Ho | China 1991 International Conference on Circuits and Systems | 0 | 0 | |
183 | 1991 | An efficient parallel motion estimation algorithm for digital image processing | LIANG-GEE CHEN ; Chen, Wai-Ting; Jehng, Yen-Shen; Chuch, Chin-Ta | Proceedings - IEEE International Symposium on Circuits and Systems | 34 | 0 | |
184 | 1991 | A globally static rate optimal scheduling for recursive DSP algorithms | Jeng, Lih-Gwo; Chen, Liang-Gee | International Conference on Acoustics, Speech, and Signal Processing, 1991. ICASSP-91 | 0 | 0 | |
185 | 1991 | An automatic synthesizer for CMOS operational amplifiers | Kuo, Chin-Yuan; Chen, Liang-Gee ; Parng, Tai-Ming | Design Automation. EDAC | 0 | 0 | |
186 | 1991 | An Efficient Parallel Motion Estimation Algorithm Image Processing for Digital | LIANG-GEE CHEN ; Chen, W.-T.; Jehng, Y.-S.; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 34 | 53 | |
187 | 1991 | ASG: Automatic schematic generator | Jehng, Y.-S.; Chen, L.-G.; Parng, T.-M.; LIANG-GEE CHEN | Integration, the VLSI Journal | 12 | 8 | |
188 | 1991 | 超級電腦之研究發展 | 龐台銘; 郭德盛; 顏嗣鈞 ; 陳良基 ; 雷欽隆 ; 賴飛羆 | ||||
189 | 1991 | 一種減少狀態點數腓特比解碼器的積體電路設計 | 林茂昭 ; 陳良基 | ||||
190 | 1991 | 智慧型超大型積體電路設計自動化系統(III) | 楊武純; 陳良基 ; 賴飛羆 ; 龐台銘 | ||||
191 | 1991 | 數位訊號處理矽編譯器之研究(台大 VLSI-CAD子計畫之四) | 陳良基 | ||||
192 | 1991 | Predictive parallel motion estimation algorithm for digital image processing | Chen, Liang-Gee; Chen, Wai-Ting; Jehng, Yen-Shen; Chiueh, Tzi-Dar; LIANG-GEE CHEN | IEEE International Conference on Computer Design - VLSI in Computers and Processors | |||
193 | 1991 | A globally static rate optimal scheduling for recursive DSP algorithms | Jeng, Lih-Gwo; Chen, Liang-Gee; LIANG-GEE CHEN | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | |||
194 | 1991 | 智慧型超大型積體電路設計自動化系統(四) | 陳良基 ; 陳少傑 | ||||
195 | 1991 | 台北地區多計劃晶片設計服務 | 陳良基 | ||||
196 | 1991 | Optimal module set and clock cycle selection for DSP synthesis | Chen, Liang-Gee; Jeng, Lih-Gwo; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
197 | 1990 | 智慧型超大型積體電路設計自動化系統;數位訊號處理矽編譯器系統架構之建立 | 陳良基 | ||||
198 | 1990 | 智慧型超大型積體電路設計自動化系統(III) | 賴飛羆 ; 陳良基 | ||||
199 | 1989 | Computation with simultaneously concurrent error detection using bi-directional operands | LIANG-GEE CHEN ; Chen, T.H. | Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors | 4 | 0 | |
200 | 1989 | 智慧型超大型積體電路設計自動化系統(II) | 陳良基 ; 林呈祥; 楊武純 | ||||
201 | 1988 | Partitioned Matrix Arithmetic with High Reliability | 張莉莉((Lily Chang); 陳良基(Liang-Gee Chen); LIANG-GEE CHEN | 國防管理學報 | |||
202 | 1987 | HIERARCHICAL FUNCTIONAL VERIFICATION FOR CELL-BASED DESIGN STYLES. | Chen, L.G.; Lee, J.Y.; Wang, J.F.; LIANG-GEE CHEN | IEE proceedings. Part G. Electronic circuits and systems | |||
203 | 1987 | Hierarchical functional verification for cell-based design styles | Chen, L.G.; Lee, J.Y.; Wang, J.F.; LIANG-GEE CHEN | IEE Proceedings G: Electronics Circuits and Systems | 0 | 0 | |
204 | 1987 | An Interactive Net Connectivity Check Strategy | Chen, L.G.; Huang, R.J.; Wang, J.F.; Lee, J.Y.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems | 0 | 0 | |
205 | 1986 | Fast execution for circuit consistency verification | Chen, L.G.; Lee, J.Y.; Wang, J.F.; Chen, K.T.; LIANG-GEE CHEN | Integration, the VLSI Journal | 3 | 3 | |
206 | 1986 | HIERARCHICAL FILTER FOR CIRCUIT LAYOUT. | Chen, L.G.; Wang, J.F.; Lee, J.Y.; Lee, H.T.; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
207 | 1985 | NEW COMPARISON ALGORITHM FOR VERIFYING LOGIC INTERCONNECTION OF VLSI. | Chen, L.G.; Lee, J.Y.; Chen, K.T.; Wang, J.F.; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems | |||
208 | 1983 | Numerical analysis of an injection laser with stripe geometry | Chen, L.G.; Chang, C.Y.; Su, Y.K.; Wu, T.S.; LIANG-GEE CHEN | Optics and Lasers in Engineering | 0 | 0 | |
209 | 1981 | Characterization of FaAs epitaxial layers by low pressure MOVPE using TEG as Ga source | Chang, C.Y.; Su, Y.K.; Lee, M.K.; Chen, L.G.; Houng, M.P.; LIANG-GEE CHEN | Journal of Crystal Growth | 36 | 36 | |
210 | 1981 | GROWTH AND PROPERTIES OF GaP/Si DEVICE BY MOCVD. | Su, Y.K.; Chang, C.Y.; Wu, T.S.; Lee, M.K.; Houng, M.P.; Chen, L.G.; LIANG-GEE CHEN | Proceedings of the Electrochemical Society |