第 1 到 247 筆結果,共 247 筆。
公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 | |
---|---|---|---|---|---|---|---|
1 | 2007 | 124 MSamples/s pixel-pipelined motion-JPEG 2000 codec without tile memory | Chang, Y.-W.; Cheng, C.-C.; Chen, C.-C.; Fang, H.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 8 | 6 | |
2 | 2015 | A 130.3 mW 16-core mobile GPU with power-aware pixel approximation techniques | Chen, Y.-J.; Hsu, C.-H.; Hung, C.-Y.; Chang, C.-M.; Chuang, S.-Y.; Chen, L.-G.; Chien, S.-Y.; LIANG-GEE CHEN ; SHAO-YI CHIEN | IEEE Journal of Solid-State Circuits | 5 | 3 | |
3 | 2010 | A 212 MPixels/s 4096 × 2160p multiview video encoder chip for 3D/Quad full HDTV applications | Ding, L.-F.; Chen, W.-Y.; Tsung, P.-K.; Chuang, T.-D.; Hsiao, P.-H.; Chen, Y.-H.; Chiu, H.-K.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN ; SHAO-YI CHIEN | IEEE Journal of Solid-State Circuits | 50 | 40 | |
4 | 1996 | A 32-bit logarithmic number system processor | Huang, S.-C.; LIANG-GEE CHEN ; Chen, T.-H. | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 5 | 5 | |
5 | 1997 | A bit-level pipelined VLSI architecture for the running order algorithm | Chen, C.-T.; Chen, L.-G.; Hsiao, J.-H.; LIANG-GEE CHEN | IEEE Transactions on Signal Processing | 4 | 2 | |
6 | 1998 | A block shifting method for reduction of blocking effects in subband/wavelet image coding | Wu, P.-C.; Chen, L.-G.; Lai, Y.-K.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 1 | 1 | |
7 | 1997 | A cost-effective architecture for 8 × 8 two-dimensional DCT/IDCT using direct method | Lee, Y.-P.; Chen, T.-H.; LIANG-GEE CHEN ; Chen, M.-J.; Ku, C.-W. | IEEE Transactions on Circuits and Systems for Video Technology | 80 | 0 | |
8 | 2001 | A Cost-Effective Design for MPEG-2 Audio Decoder with Embedded RISC Core | Tsai, T.-H.; Wu, R.-J.; Chen, L.-G.; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 0 | 0 | |
9 | 1998 | A data-interlacing architecture with two-dimensional data-reuse for full-search block-matching algorithm | Lai, Y.-K.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 66 | 59 | |
10 | 2002 | A digital signal processor with programmable correlator array architecture for third generation wireless communication system | Chen, C.-K.; Tseng, P.-C.; Chang, Y.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing | 16 | 39 | |
11 | 2012 | A flexible fully hardwired CABAC encoder for UHDTV H.264/AVC high profile video | Tsai, C.-H.; Tang, C.-S.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 16 | 13 | |
12 | 1994 | A High Quality MC-OBTC Codec for Video Signal Processing | Chen, L.-G.; Liu, Y.-C.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 16 | 12 | |
13 | 1999 | A LOG-EXP still image compression chip design | Huang, S.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 3 | 2 | |
14 | 2004 | A low complexity design of psycho-acoustic model for MPEG-2/4 advanced audio coding | Huang, S.-W.; Tsai, T.-H.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 7 | 6 | |
15 | 2000 | A Low Power 8 × 8 Direct 2-D DCT Chip Design | Chang, H.-C.; Jiu, J.-Y.; Chen, L.-L.; Chen, L.-G.; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 0 | 8 | |
16 | 1996 | A multimedia video conference system: Using region base hybrid coding | Chen, H.-T.; Wu, P.-C.; Lai, Y.-K.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 12 | 11 | |
17 | 2010 | A novel 2Dd-to-3D conversion system using edge information | Cheng, C.-C.; Li, C.-T.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 81 | 67 | |
18 | 2000 | A novel architecture of inverse quantization and multichannel processing for mpeg-2 audio decoding | Tsai, T.-H.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing | 1 | 1 | |
19 | 2001 | A novel low-power full-search block-matching motion-estimation design for H.263+ | Shen, J.-F.; Wang, T.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 47 | 0 | |
20 | 1998 | A novel MPEG audio degrouping algorithm and its architecture design | Tsai, T.-H.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Signal Processing | |||
21 | 1997 | A novel MPEG-2 audio decoder with efficient data arrangement and memory configuration | Tsai, T.-H.; Chen, L.-G.; Liu, Y.-C.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 10 | 0 | |
22 | 1996 | A novel video signal processor with programmable data arrangement and efficient memory configuration | Lai, Y.-K.; Chen, L.-G.; Chen, H.-T.; Chen, M.-J.; Lee, Y.-P.; Wu, P.-C.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 4 | 5 | |
23 | 2001 | A programmable parallel VLSI architecture for 2-D discrete wavelet transform | Chen, C.-Y.; Yang, Z.-L.; Wang, T.-C.; Chen, L.-G.; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 10 | 6 | |
24 | 2007 | A quality-of-experience video adaptor for serving scalable video applications | Pan, C.-H.; Lee, I.-H.; Huang, S.-C.; Lian, C.-J.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 7 | 5 | |
25 | 2011 | A real-time 1080p 2D-to-3D video conversion system | Tsai, S.-F.; Cheng, C.-C.; Li, C.-T.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 38 | 33 | |
26 | 1994 | Accuracy Improvement and Cost Reduction of 3-Step Search Block Matching Algorithm for Video Coding | Jong, H.-M.; Chen, L.-G.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 61 | 54 | |
27 | 1998 | An adaptive network control scheme for region-based hybrid coding algorithm | Chen, Hsu-Teng; Chen, Liang-Gee ; Huang, Sheng-Chieh; Tsai, Tsung-Han; Chang, Hao-Chieh | 1998 IEEE International Symposium on Circuits and Systems, 1998. ISCAS '98 | 0 | 0 | |
28 | 2005 | Advances in hardware architectures for image and video coding - A survey | Tseng, P.-C.; Chang, Y.-C.; Huang, Y.-W.; Fang, H.-C.; Huang, C.-T.; Chen, L.-G.; LIANG-GEE CHEN | Proceedings of the IEEE | 45 | 37 | |
29 | 2006 | Algorithm analysis and architecture design for HDTV applications | Chen, T.-C.; Fang, H.-C.; Lian, C.-J.; Tsai, C.-H.; Huang, Y.-W.; Chen, T.-W.; Chen, C.-Y.; Chen, Y.-H.; Tsai, C.-Y.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Circuits and Devices Magazine | 12 | 11 | |
30 | 2009 | Algorithm and architecture design of power-oriented H.264/AVC baseline profile encoder for portable devices | Chen, Y.-H.; Chen, T.-C.; Tsai, C.-Y.; Tsai, S.-F.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 30 | 29 | |
31 | 2001 | An efficient architecture for two-dimensional discrete wavelet transform | Wu, P.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 147 | 107 | |
32 | 2005 | An efficient embedded bitstream parsing processor for MPEG-4 video decoding system | Chang, Yung-Chi; Huang, Chao-Chih; Chao, Wei-Min; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 3 | 2 | |
33 | 1997 | An I-phone system design and implementation with a portable speech coding coprocessor | Chen, R.-X.; Chen, L.-G.; Chen, M.-J.; Tsai, T.-H.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 1 | 1 | |
34 | 1995 | An MPEG audio decoder chip | Tsai, T.-H.; LIANG-GEE CHEN ; Chen, T.-H. | IEEE Transactions on Consumer Electronics | 16 | 16 | |
35 | 2006 | Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder | Chen, Tung-Chien; SHAO-YI CHIEN ; Huang, Yu-Wen; Tsai, Chen-Han; Chen, Ching-Yeh; Chen, To-Wei; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 262 | 211 | |
36 | 2003 | Analysis and architecture design of block-coding engine for EBCOT in JPEG 2000 | Lian, C.J.; Chen, K.-F.; Chen, H.-H.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 216 | 151 | |
37 | 2001 | Analysis and architecture design of lifting based DWT and EBCOT for JPEG 2000 | Lian, Chung-Jr; Chen, Kuan-Fu; Chen, Hong-Hui; Chen, Liang-Gee | International Symposium on VLSI Technology, Systems, and Applications, 2001 | 0 | 0 | |
38 | 2006 | Analysis and architecture design of variable block-size motion estimation for H.264/AVC | Chen, Ching-Yeh; SHAO-YI CHIEN ; Huang, Yu-Wen; Chen, Tung-Chien; Wang, Tu-Chih; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems I: Regular Papers | 217 | 186 | |
39 | 2006 | Analysis and complexity reduction of multiple reference frames motion estimation in H.264/AVC | Huang, Yu-Wen; Hsieh, Bing-Yu; Chien, Shao-Yi ; Ma, Shyh-Yih; Chen, Liang-Gee | IEEE Transactions on Circuits and Systems for Video Technology | 175 | 121 | |
40 | 2004 | Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture | Chen, Tung-Chien; Huang, Yu-Wen; Chen, Liang-Gee | International Symposium on Circuits and Systems, 2004. ISCAS '04 | |||
41 | 2011 | Analysis and design of on-sensor ECG processors for realtime detection of cardiac anomalies including VF, VT, and PVC | Chen, H.-H.; Chiang, C.-Y.; Chen, T.-C.; Liu, C.-S.; Huang, Y.-J.; Lu, S.-S.; Lin, C.-W.; Chen, L.-G.; LIANG-GEE CHEN ; SHEY-SHI LU ; CHII-WANN LIN | Journal of Signal Processing Systems | 4 | 2 | |
42 | 2008 | Analysis and Hardware Architecture Design of Global Motion Estimation | Chen, Yi-Hau; Chien, Shao-Yi ; Chen, Ching-Yeh; Huang, Yu-Wen; Chen, Liang-Gee | Journal of Signal Processing Systems | 6 | 6 | |
43 | 2005 | Analysis and VLSI architecture for 1-D and 2-D discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE Transactions on Signal Processing | 72 | 55 | |
44 | 2006 | Analysis and VLSI architecture of update step in motion-compensated temporal filtering | Cheng, Chih-Chi; Chen, Ching-Yeh; Chen, Yi-Hau; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 2006. ISCAS 2006 | 0 | 0 | |
45 | 2002 | Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000 | Chen, Hong-Hui; Lian, Chung-Jr; Chang, Te-Hao; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 2002. ISCAS 2002. | 0 | 0 | |
46 | 2005 | Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder | Huang, Y.-W.; Hsieh, B.-Y.; Chen, T.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 268 | 186 | |
47 | 1994 | Application-specific chip design using behavioral silicon compiler | Chen, Liang-Gee; Jeng, Lih-Gwo; Lin, Dong-Jye; LIANG-GEE CHEN | Journal of the Chinese Institute of Engineers, Transactions of the Chinese Institute of Engineers, Series A/Chung-kuo Kung Ch'eng Hsuch K'an | 0 | 0 | |
48 | 1996 | The arbitrarily shaped transform of segmented motion field for a pseudo object-oriented very low bit-rate video coding system | Ku, Chung-Wei; Chiu, You-Ming; Chen, Liang-Gee ; Lee, Yung-Pin | IEEE International Symposium on Circuits and Systems, 1996. ISCAS '96 | 0 | 0 | |
49 | 2006 | Architecture Design of Context-Based Adaptive Variable-Length Coding for H.264/AVC | Chen, Tung-Chien; Huang, Yu-Wen; Tsai, Chuan-Yung; Hsieh, Bing-Yu; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems II: Express Briefs | 39 | 28 | |
50 | 2010 | Architecture design of fine grain quality scalable encoder with CABAC for H.264/AVC scalable extension | Chuang, T.-D.; Chen, Y.-J.; Chen, Y.-H.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN ; SHAO-YI CHIEN | Journal of Signal Processing Systems | 3 | 1 | |
51 | 2008 | Architecture design of full HD JPEG XR encoder for digital photography applications | Pan, C.-H.; Chien, C.-Y.; Chao, W.-M.; Huang, S.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 19 | 12 | |
52 | 2004 | Area efficient architecture for the embedded block coding in JPEG 2000 | Chang, Yu-wei; Fang, Hung-chi; Chen, Chun-chia; Chen, Liang-gee | 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04 | 0 | 0 | |
53 | 1991 | ASG: Automatic schematic generator | Jehng, Y.-S.; Chen, L.-G.; Parng, T.-M.; LIANG-GEE CHEN | Integration, the VLSI Journal | 12 | 8 | |
54 | 1991 | An automatic synthesizer for CMOS operational amplifiers | Kuo, Chin-Yuan; Chen, Liang-Gee ; Parng, Tai-Ming | Design Automation. EDAC | 0 | 0 | |
55 | 2004 | B-spline factorization-based architecture for inverse discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee | International Symposium on Circuits and Systems, 2004. ISCAS '04 | |||
56 | 2005 | Bandwidth optimized motion compensation hardware design for H.264/AVC HDTV decoder | Tsai, Chuan-Yung; Chen, Tung-Chien; Chen, To-Wei; LIANG-GEE CHEN | 48th Midwest Symposium on Circuits and Systems, 2005 | 44 | 0 | |
57 | 2013 | Brain-inspired framework for fusion of multiple depth cues | Li, C.-T.; Lai, Y.-C.; Wu, C.; Tsai, S.-F.; Chen, T.-C.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN ; SHAO-YI CHIEN | IEEE Transactions on Circuits and Systems for Video Technology | 6 | 7 | |
58 | 1993 | Cache vector quantisation algorithm in video compression | Ku, C.-W.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | Electronics Letters | 0 | 0 | |
59 | 2001 | CDSP: an application-specific digital signal processor for third generation wireless communications | Tseng, Po-Chih; Chen, Chi-Kuang; Chen, Liang-Gee | International Conference on Consumer Electronics, 2001 | 0 | 0 | |
60 | 2001 | CDSP: An application-specific digital signal processor for third generation wireless communications | Tseng, P.-C.; Chen, C.-K.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 4 | 3 | |
61 | 1981 | Characterization of FaAs epitaxial layers by low pressure MOVPE using TEG as Ga source | Chang, C.Y.; Su, Y.K.; Lee, M.K.; Chen, L.G.; Houng, M.P.; LIANG-GEE CHEN | Journal of Crystal Growth | 36 | 36 | |
62 | 2021 | CMWMF: Constant Memory Architecture of Weighted Mode/Median Filter for Extremely Large Label Depth Refinement | Wu S.-S; Chen L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 0 | 0 | |
63 | 2002 | Computation reduction technique for lossy JPEG2000 encoding through EBCOT Tier-2 feedback processing | Chang, Te-Hao; Chen, Li-Lin; Lian, Chung-Jr; Chen, Hong-Hui; LIANG-GEE CHEN | Image | 0 | 0 | |
64 | 2003 | Computationally controllable integer, half, and quarter-pel motion estimator for MPEG-4 Advanced Simple Profile | Chao, Wei-Min; Chen, Tung-Chien; Chang, Yung-Chi; Hsu, Chih-Wei; Chen, Liang-Gee | 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03 | |||
65 | 1993 | Concurrent Error-Detectable Butterfly Chip for Real-Time FFT Processing Through Time Redundancy | Chen, T.-H.; LIANG-GEE CHEN | IEEE Journal of Solid-State Circuits | 8 | 6 | |
66 | 2008 | Content-Aware Prediction Algorithm with Inter-View Mode Decision for Multiview Video Coding | Ding, L.-F.; Tsung, P.-K.; SHAO-YI CHIEN ; Chen, W.-Y.; LIANG-GEE CHEN | IEEE Transactions on Multimedia | 51 | 38 | |
67 | 1999 | Cost-effective design for MPEG2 audio decoder with embedded RISC core | Tsai, Tsung-Han; Chen, Liang-Gee; Wu, Ren-Jr; LIANG-GEE CHEN | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 0 | 0 | |
68 | 2008 | Data reuse exploration for low power motion estimation architecture design in H.264 encoder | Chen, Yu-Han; Chen, Tung-Chien; Tsai, Chuan-Yung; Tsai, Sung-Fang; LIANG-GEE CHEN | Journal of Signal Processing Systems | 8 | 9 | |
69 | 1992 | DCT-based interframe coding for video codec | Jong, H.-M.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | Electronics Letters | 0 | 0 | |
70 | 1992 | Design and analysis of VLSI-based arithmetic arrays with error correction | Chen, T.-H.; LIANG-GEE CHEN ; Jehng, Y.-S. | International Journal of Electronics | 4 | 2 | |
71 | 2001 | Design and implementation of a bitstream parsing coprocessor for MPEG-4 video system-on-chip solution | Chang, Yung-Chi; Chang, Hao-Chieh; Chen, Liang-Gee | International Symposium on VLSI Technology, Systems, and Applications, 2001 | 0 | 0 | |
72 | 1998 | Design and implementation of low-power DCT chip for portable multimedia terminals | Chen, Liang-Gee ; Jiu, Juing-Ying; Chang, Hao-Chieh | IEEE Workshop on Signal Processing Systems, 1998. SIPS 98 | 0 | 0 | |
73 | 1994 | Design and VLSI implementation of real-time weighted median filters | Chen, Chun-Te; Chen, Liang-Gee ; Chiueh, Tzi-Dar ; Hsiao, Jue-Hsuan | IEEE Asia-Pacific Conference on Circuits and Systems, 1994. APCCAS '94 | 0 | 0 | |
74 | 1992 | Design of concurrent error-detectable VLSI-based array dividers | Chen, Thou-Ho; Chen, Liang-Gee ; LIANG-GEE CHEN | IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1992. ICCD '92 | 0 | 0 | |
75 | 1996 | Design strategy for three-dimensional subband filter banks | Wu, Po-Cheng; Chen, Liang-Gee ; Lai, Yeong-Kang; LIANG-GEE CHEN | International Conference on Image Processing, 1996 | 0 | 0 | |
76 | 2003 | Effective hardware-oriented technique for the rate control of JPEG2000 encoding | Chang, Te-Hao; Lian, Chung-Jr; Chen, Hong-Hui; Chang, Jing-Ying; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 2003, ISCAS '03 | 0 | 0 | |
77 | 2000 | Efficient algorithms and architectures for MPEG-4 object-based video coding | Chang, Hao-Chieh; Wang, Yi-Chu; Hsu, Mei-Yun; LIANG-GEE CHEN | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 12 | 0 | |
78 | 1993 | An Efficient and Simple VLSI Tree Architecture for Motion Estimation Algorithms | Jehng, Y.-S.; Chen, L.-G.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Signal Processing | 109 | 82 | |
79 | 2008 | Efficient Architecture Design of Motion-Compensated Temporal Filtering/Motion Compensated Prediction Engine | Chen, Yi-Hau; Cheng, Chih-Chi; Chuang, Tzu-Der; Chen, Ching-Yeh; Chien, Shao-Yi ; Chen, Liang-Gee | IEEE Transactions on Circuits and Systems for Video Technology | 8 | 5 | |
80 | 1999 | Efficient architecture for two-dimensional discrete wavelet transform | Wu, Po-Cheng; Chen, Liang-Gee; LIANG-GEE CHEN | International Symposium on VLSI Technology, Systems, and Applications | |||
81 | 1999 | An efficient architecture for two-dimensional discrete wavelet transform | Wu, Po-Cheng; Chen, Liang-Gee | International Symposium on VLSI Technology, Systems, and Applications, 1999 | 0 | 0 | |
82 | 2002 | An efficient architecture for two-dimensional inverse discrete wavelet transform | Wu, P.-C.; Huang, C.-T.; Chen, L.-G.; LIANG-GEE CHEN | Proceedings - IEEE International Symposium on Circuits and Systems | 6 | 0 | |
83 | 1997 | An efficient array architecture with data-rings for 3-step hierarchical search block matching algorithm | Lai, Yeong-Kang; Chen, Liang-Gee ; Shen, Jun-Fu | Circuits and Systems, 1997. ISCAS '97. | 0 | 0 | |
84 | 1996 | Efficient hybrid tree/linear array architectures for block-matching motion estimation algorithms | MIIN-JANG CHEN ; LIANG-GEE CHEN ; Cheng, K.-N.; Chen, M.C. | IEE Proceedings: Vision, Image and Signal Processing | 5 | 4 | |
85 | 2002 | Efficient moving object segmentation algorithm using background registration technique | Chien, Shao-Yi ; Ma, Shyh-Yih; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 334 | 261 | |
86 | 1991 | An Efficient Parallel Motion Estimation Algorithm Image Processing for Digital | LIANG-GEE CHEN ; Chen, W.-T.; Jehng, Y.-S.; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 34 | 53 | |
87 | 1996 | An efficient visual pattern block truncation coding | Chen, Liang-Gee ; Liu, Yuan-Chen | International Symposium on Circuits and Systems, 1996. ISCAS '96 | 0 | 0 | |
88 | 2002 | Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, ISCAS 2002 | 0 | 0 | |
89 | 2000 | Embedded JPEG encoder IP core and memory efficient preprocessing architecture for scanner | Lian, Chung-Jr; Chen, Liang-Gee ; Chang, Hao-Chieh; Chang, Yung-Chi | The 2000 IEEE Asia-Pacific Conference on Circuits and Systems, 2000. APCCAS 2000 | 0 | 0 | |
90 | 2003 | Error concealment algorithm using interested direction for JPEG 2000 image transmission | Lee, Pei-Jun; Chen, Mei-Juan; Chen, Liang-Gee; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 12 | 10 | |
91 | 1997 | Error concealment of lost motion vectors with overlapped motion compensation | Chen, M.-J.; Chen, L.-G.; Weng, R.-M.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 123 | 100 | |
92 | 2004 | Extended intelligent edge-based line average with its implementation and test method | Chang, Yu-Lin; Lin, Shyh-Feng; Chen, Liang-Gee | International Symposium on Circuits and Systems, 2004. ISCAS '04 | |||
93 | 2007 | Fast Algorithm and Architecture Design of Low-Power Integer Motion Estimation for H.264/AVC | Chen, Tung-Chien; Chen, Yu-Han; Tsai, Sung-Fang; SHAO-YI CHIEN ; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 85 | 69 | |
94 | 2005 | Fast decomposition of filterbanks for the state-of-the-art audio coding | Huang, S.-W.; Tsai, T.-H.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Signal Processing Letters | 8 | 6 | |
95 | 1986 | Fast execution for circuit consistency verification | Chen, L.G.; Lee, J.Y.; Wang, J.F.; Chen, K.T.; LIANG-GEE CHEN | Integration, the VLSI Journal | 3 | 3 | |
96 | 2017 | Fast Physically Correct Refocusing for Sparse Light Fields Using Block-Based Multi-Rate View Interpolation | Huang, C.-T.; Wang, Y.-W.; Huang, L.-R.; Chin, J.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Image Processing | 2 | 2 | |
97 | 2004 | Fast video segmentation algorithm with shadow cancellation, global motion compensation, and adaptive threshold techniques | SHAO-YI CHIEN ; Huang, Yu-Wen; Hsieh, Bing-Yu; Ma, Shyh-Yih; LIANG-GEE CHEN | IEEE Transactions on Multimedia | 115 | 88 | |
98 | 1991 | Fault-tolerant serial-parallel multiplier | LIANG-GEE CHEN ; Chen, T.H. | IEE Proceedings E: Computers and Digital Techniques | 5 | 4 | |
99 | 2005 | Feature-based error concealment for object-based video | Lee, P.-J.; Chen, H.H.; Wang, W.-J.; Chen, L.-G.; LIANG-GEE CHEN ; HOMER H. CHEN | IEICE Transactions on Communications | 3 | 3 | |
100 | 1997 | A flexible data-interlacing architecture for full-search block-matching algorithm | Lai, Yeong-Kang; Chen, Liang-Gee ; LIANG-GEE CHEN | IEEE International Conference on Application-Specific Systems, Architectures and Processors, 1997 | 0 | 0 | |
101 | 2004 | Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE Transactions on Signal Processing | 198 | 137 | |
102 | 2004 | Four field local motion compensated de-interlacing | Chang, Yu-Lin; Wu, Ping-Hao; Lin, Shyh-Feng; LIANG-GEE CHEN | International Conference on Acoustics, Speech, and Signal Processing, 2004. ICASSP-04 | 0 | 0 | |
103 | 2006 | Frame-level data reuse for motion-compensated temporal filtering | Chen, Ching-Yeh; Chen, Yi-Hau; Cheng, Chih-Chi; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 2006. ISCAS 2006 | 0 | 0 | |
104 | 2004 | Fully utilized and reusable architecture for fractional motion estimation of H.264/AVC | Chen, Tung-Chien; Huang, Yu-Wen; LIANG-GEE CHEN | International Conference on Acoustics, Speech, and Signal Processing, 2004. ICASSP-04 | 0 | 0 | |
105 | 2002 | Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method | Tseng, Po-Chih; Huang, Chao-Tsung; LIANG-GEE CHEN | IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS | 44 | 0 | |
106 | 2005 | Generic RAM-based architectures for two-dimensional discrete wavelet transform with line-based method | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 81 | 61 | |
107 | 2004 | Global elimination algorithm and architecture design for fast block matching motion estimation | Huang, Yu-Wen; SHAO-YI CHIEN ; Hsieh, Bing-Yu; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 73 | 53 | |
108 | 1991 | A globally static rate optimal scheduling for recursive DSP algorithms | Jeng, Lih-Gwo; Chen, Liang-Gee | International Conference on Acoustics, Speech, and Signal Processing, 1991. ICASSP-91 | 0 | 0 | |
109 | 2013 | Guest editorial: Special section on new software/hardware paradigms for error-tolerant multimedia systems | reopoulos, Y.; Chen, L.-G.; Evans, B.L.; Jiang, H.; Kumar, R.; LIANG-GEE CHEN | IEEE Transactions on Multimedia | 0 | 0 | |
110 | 2001 | Guest Editors' Introduction. | Chen, Liang-Gee; Hang, Hsueh-Ming; Kuroda, Ichiro; LIANG-GEE CHEN | VLSI Signal Processing | 0 | 0 | |
111 | 2001 | H.26L intra mode encoder architecture for digital camera application | Wang, Tu-Chih; Tseng, Po-Chih; Chen, Liang-Gee | International Conference on Consumer Electronics | 0 | 0 | |
112 | 2004 | Hardware architecture design for H.264/AVC intra frame coder | Huang, Yu-Wen; Hsieh, Bing-Yu; Chen, Tung-Chien; Chen, Liang-Gee | 2004 International Symposium on Circuits and Systems. ISCAS '04 | |||
113 | 2003 | Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264 | Huang, Yu-Wen; Wang, Tu-Chih; Hsieh, Bing-Yu; Chen, Liang-Gee | 2003 International Symposium on Circuits and Systems. ISCAS '03 | |||
114 | 2004 | Hardware architecture design for visual processing: present and future | Tseng, Po-Chih; Chen, Liang-Gee | Advanced System Integrated Circuits 2004 | 0 | 0 | |
115 | 2006 | Hardware architecture design of an H.264/AVC video codec | Chen, Tung-Chien; Lian, Chung-Jr; LIANG-GEE CHEN | Asia and South Pacific Conference on Design Automation | 0 | 0 | |
116 | 2005 | Hardware architecture design of video compression for multimedia communication systems | Chen, Liang-Gee; Chen, Homer H.; Chen, Ching-Yeh; Huang, Yu-Wen; LIANG-GEE CHEN ; Chien, Shao-Yi | IEEE Communications Magazine | 40 | 30 | |
117 | 1997 | Hardware efficient design of filter banks for video coding | Wu, Po-Cheng; Chen, Liang-Gee ; Liu, Yuan-Chen; Lai, Yeong-Kang | Circuits and Systems, 1997. ISCAS '97. | 0 | 0 | |
118 | 2003 | Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9,7) filter bank | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | International Conference on Image Processing, 2003 | 0 | 0 | |
119 | 2005 | Hardware oriented content-adaptive fast algorithm for variable block-size integer motion estimation in H.264 | Chen, Yu-Han; Chen, Tung-Chien; Chen, Liang-Gee | 2005 International Symposium on Intelligent Signal Processing and Communication Systems | 0 | 0 | |
120 | 2003 | Hardware oriented rate control algorithm and implementation for realtime video coding | Fang, Hung-Chi; Wang, Tu-Chih; Chang, Yu-Wei; Chen, Liang-Gee | 2003 International Conference on Multimedia and Expo, ICME '03 | |||
121 | 1993 | Hardware verification using symbolic state transition graphs | Chen, Pin-hong; Shyu, Jyuo-Min; LIANG-GEE CHEN | 1993 IEEE International Conference on Computer Design: VLSI in Computers and Processors | 0 | 0 | |
122 | 2021 | Hardware- And Memory-Efficient Architecture for Disparity Estimation of Large Label Counts | Wu S.-S; Chen H.-H; Chen L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 1 | 1 | |
123 | 2003 | Hardware-efficient architecture design for zerotree coding in MPEG-4 still texture coder | Lian, C.-J.; Yang, Z.-L.; Chang, H.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | |||
124 | 2011 | Hardware-efficient belief propagation | Liang, C.-K.; Cheng, C.-C.; Lai, Y.-C.; Chen, L.-G.; Chen, H.H.; LIANG-GEE CHEN ; HOMER H. CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 53 | 40 | |
125 | 1995 | A hardware-oriented design for weighted median filters | Chen, Chun-Te; Chen, Liang-Gee ; Hsiao, Jue-Hsuan | Asian and South Pacific Design Automation Conference, IFIP International Conference on Hardware Description Languages and IFIP International Conference on Very Large Scale Integration, ASP-DAC '95/CHDL '95/VLSI '95 | 0 | 0 | |
126 | 2003 | Hardware-oriented optimization and block-level architecture design for MPEG-4 FGS encoder | Hsu, Chih-Wei; Chang, Yung-Chi; Chao, Wei-Min; Chen, Liang-Gee | 2003 International Symposium on Circuits and Systems. ISCAS '03 | |||
127 | 1987 | Hierarchical functional verification for cell-based design styles | Chen, L.G.; Lee, J.Y.; Wang, J.F.; LIANG-GEE CHEN | IEE Proceedings G: Electronics Circuits and Systems | 0 | 0 | |
128 | 1987 | HIERARCHICAL FUNCTIONAL VERIFICATION FOR CELL-BASED DESIGN STYLES. | Chen, L.G.; Lee, J.Y.; Wang, J.F.; LIANG-GEE CHEN | IEE proceedings. Part G. Electronic circuits and systems | |||
129 | 2003 | High speed memory efficient EBCOT architecture for JPEG2000 | Fang, Hung-Chi; Wang, Tu-Chih; Lian, Chung-Jr; Chang, Te-Hao; LIANG-GEE CHEN | 2003 International Symposium on Circuits and Systems. ISCAS '03 | 0 | 0 | |
130 | 1994 | High throughput CORDIC-based systolic array design for the discrete cosine transform | Hsiao, Jue-Hsuan; Chen, Liang-Gee ; Chiueh, Tzi-Dar ; LIANG-GEE CHEN | 1994 IEEE International Symposium on Circuits and Systems, 1994. ISCAS '94., | 0 | 0 | |
131 | 1995 | High Throughput CORDIC-Based Systolic Array Design for the Discrete Cosine Transform | Hsiao, J.-H.; Cher, L.-G.; Chiueh, T.-D.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 26 | 24 | |
132 | 2006 | High-performance JPEG 2000 encoder with rate-distortion optimization | Fang, H.-C.; Chang, Y.-W.; Wang, T.-C.; Huang, C.-T.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Multimedia | 10 | 9 | |
133 | 2006 | Hybrid Morphology Processing Unit Architecture for Moving Object Segmentation Systems | SHAO-YI CHIEN ; Hsieh, Bing-Yu; Huang, Yu-Wen; Ma, Shyh-Yih; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 5 | 3 | |
134 | 1996 | Ic design of an adaptive viterbi decoder | Chan, M.-H.; Lee, W.-T.; Lin, M.-C.; LIANG-GEE CHEN ; MAO-CHAO LIN | IEEE Transactions on Consumer Electronics | 25 | 18 | |
135 | 1997 | Implementation strategy of MPEG-2 audio decoder and efficient multichannel architecture | Tsai, Tsung-Han; Chen, Liang-Gee ; Chen, Ruei-Xi | 1997 IEEE Workshop on Signal Processing Systems, SIPS 97 | 0 | 0 | |
136 | 1993 | Intelligent digital filter synthesis system | Chen, L.-G.; Chao, C.-T.; LIANG-GEE CHEN | Journal of the Chinese Institute of Engineers, Transactions of the Chinese Institute of Engineers,Series A/Chung-kuo Kung Ch'eng Hsuch K'an | 0 | 0 | |
137 | 2006 | Interactive content-aware video streaming system with fine granularity scalability | Chang, Y.-C.; Hsu, C.-W.; Chao, W.-M.; Chen, L.-G.; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 0 | 0 | |
138 | 1987 | An Interactive Net Connectivity Check Strategy | Chen, L.G.; Huang, R.J.; Wang, J.F.; Lee, J.Y.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems | 0 | 0 | |
139 | 1996 | Investigation of a visual telephone prototyping on personal computers | Ku, C.-W.; Chen, L.-G.; Chen, C.-H.; Jiu, J.-Y.; Huang, C.-T.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 1 | 1 | |
140 | 2009 | iVisual: An intelligent visual sensor SoC with 2790 fps CMOS image sensor and 205 GOPS/W vision processor | Cheng, C.-C.; Lin, C.-H.; Li, C.-T.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Journal of Solid-State Circuits | 32 | 25 | |
141 | 2006 | Joint Prediction Algorithm and Architecture for Stereo Video Hybrid Coding Systems | Ding, Li-Fu; SHAO-YI CHIEN ; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 30 | 20 | |
142 | 1997 | Jointly Optimal Region-Classified Adaptive Vector Quantization for Very Low Bit Rate Video Coding | Chen; Y.-W.; Chen; L.-G.; M.-J.; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | |||
143 | 1997 | Jointly Optimal Region-Classified Adaptive Vector Quantization for Very Low Bit Rate Video Coding. | Chen, Yee-Wen; Chen, Liang-Gee; Chen, Mei-Juan; LIANG-GEE CHEN | VLSI Signal Processing | 0 | 4 | |
144 | 1992 | Language system for DSP silicon compiler | Chen, Liang-Gee; Jeng, Lih-Gwo; Tsao, Ki-Tsan; LIANG-GEE CHEN | Proceedings of the National Science Council, Republic of China, Part A: Physical Science and Engineering | |||
145 | 2006 | Level C+ data reuse scheme for motion estimation with corresponding coding orders | Chen, C.-Y.; Huang, C.-T.; Chen, Y.-H.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 108 | 86 | |
146 | 2010 | Localized detection of abandoned luggage | Chang, J.-Y.; Liao, H.-H.; Chen, L.-G.; LIANG-GEE CHEN | Eurasip Journal on Advances in Signal Processing | 25 | 18 | |
147 | 1998 | Low power 2D DCT chip design for wireless multimedia terminals | Chen, Liang-Gee ; Jiu, Juing-Ying; Chang, Hao-Chieh; Lee, Yung-Pin; Ku, Chung-Wei | IEEE International Symposium on Circuits and Systems, 1998. ISCAS '98 | 0 | 0 | |
148 | 1998 | A low power 2D DCT chip design using direct 2D algorithm | Chen, Liang-Gee ; Jiu, Juing-Ying; Chang, Hao-Chieh; Lee, Yung-Pin; LIANG-GEE CHEN | Design Automation Conference 1998 | 0 | 0 | |
149 | 2006 | Low power and power aware fractional motion estimation of H.264/AVC for mobile applications | Chen, Tung-Chien; Chen, Yu-Han; Tsai, Chuan-Yung; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 2006. ISCAS | 0 | 0 | |
150 | 1999 | Low power full-search block-matching motion estimation chip for H.263+ | Shen, Jun-Fu; Chen, Liang-Gee ; Chang, Hao-Chieh; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 1999. ISCAS '99 | 0 | 0 | |
151 | 1999 | Low power strategy about correlator array for CDMA baseband processor | Ku, Chung-Wei; Kuo, Fu-Yen; Chen, Chi-Kuang; Chen, Liang-Gee; LIANG-GEE CHEN | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | |||
152 | 1998 | A low-cost architecture design with efficient data arrangement and memory configuration for MPEG-2 audio decoder | Tsai, Tsung-Han; Chen, Liang-Gee ; Huang, Sheng-Chieh; Chang, Hao-Chieh | IEEE International Symposium on Circuits and Systems, 1998. ISCAS '98 | 0 | 0 | |
153 | 2002 | Low-delay and error-robust wireless video transmission for video communications | Wang, T.-C.; Fang, H.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 36 | 21 | |
154 | 2004 | Low-power parallel tree architecture for full search block-matching motion estimation | Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee | International Symposium on Circuits and Systems, 2004. ISCAS '04 | |||
155 | 2004 | LSI design for MPEG-4 coding system | Chang, Yung-Chi; Chao, Wei-Min; Chen, Liang-Gee | 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04 | 0 | 0 | |
156 | 2004 | Memory analysis and architecture for two-dimensional discrete wavelet transform | Huang, Chao-Tsung; Tseng, Po-Chih; LIANG-GEE CHEN | IEEE International Conference on Acoustics, Speech, and Signal Processing, 2004 | 0 | 0 | |
157 | 2006 | Memory efficient JPEG 2000 architecture with stripe pipeline scheduling | Fang, Hung-Chi; Chang, Yu-Wei; Cheng, Chih-Chi; LIANG-GEE CHEN | IEEE Transactions on Signal Processing | 5 | 5 | |
158 | 1998 | A modified MPEG-2 audio decoding scheme based on its low-cost fast algorithm and efficient data scheduling | Tsai, Tsung-Han; Chen, Liang-Gee ; Chang, Hao-Chieh; Huang, Sheng-Chieh | IEEE International Symposium on Circuits and Systems, 1998. ISCAS '98 | 0 | 0 | |
159 | 2003 | Motion adaptive de-interlacing by horizontal motion detection and enhanced ELA processing | Lin, Shyh-Feng; Chang, Yu-Lin; LIANG-GEE CHEN | 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03 | 0 | 0 | |
160 | 2003 | Motion adaptive interpolation with horizontal motion detection for deinterlacing | Lin, S.-F.; Chang, Y.-L.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 95 | 71 | |
161 | 2003 | Motion compensated de-interlacing with adaptive global motion estimation and compensation | Chang, Yu-Lin; Chen, Ching-Yeh; Lin, Shyh-Feng; LIANG-GEE CHEN | 2003 International Conference on Image Processing, 2003. ICIP 2003 | 0 | 0 | |
162 | 1992 | A motion estimator for low bit-rate video codec | Jehng, Y.-S.; Chen, L.-G.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Consumer Electronics | 9 | 7 | |
163 | 2004 | MPEG-4 FGS encoder design for an interactive content-aware MPEG-4 video streaming SOC | Chang, Yung-Chi; Hsu, Chih-Wei; Chen, Liang-Gee | 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, 2004 | |||
164 | 2000 | MPEG-4 video bitstream structure analysis and its parsing architecture design | Chang, Hao-Chieh; Chang, Yung-Chi; Tsai, Yuan-Bin; Fan, Chih-Peng; LIANG-GEE CHEN | Proceedings - IEEE International Symposium on Circuits and Systems | 3 | 0 | |
165 | 2004 | Multi-mode content-aware motion estimation algorithm for power-aware video coding systems | Lin, Siou-Shen; Tseng, Po-Chih; Lin, Chia-Ping; Chen, Liang-Gee | IEEE Workshop on Signal Processing Systems, 2004. SIPS 2004 | 0 | 0 | |
166 | 2009 | Multimode embedded compression codec engine for power-aware video coding system | Cheng, C.-C.; Tseng, P.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 61 | 53 | |
167 | 1995 | A New Block-Matching Criterion for Motion Estimation and its Implementation | Chen, M.-J.; Chen, L.-G.; Chiueh, T.-D.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 74 | 56 | |
168 | 2002 | A novel hybrid motion estimator supporting diamond search and fast full search | Chao, Wei-Min; Hsu, Chih-Wei; Chang, Yung-Chi; Chen, Liang-Gee | IEEE International Symposium on Circuits and Systems, 2002. ISCAS 2002 | |||
169 | 1999 | A novel image compression algorithm by using Log-Exp transform | Huang, Sheng-Chieh; Chen, Liang-Gee ; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 1999, ISCAS '99 | 0 | 0 | |
170 | 1997 | A novel scalable architecture with memory interleaving organization for full search block-matching algorithm | Lai, Yeong-Kang; Chen, Liang-Gee ; Tsai, Tsung-Han; Wu, Po-Cheng | IEEE International Symposium on Circuits and Systems, 1997, ISCAS '97 | 0 | 0 | |
171 | 1996 | A novel video signal processor with reconfigurable pipelined architecture | Lai, Yeong-Kang; Chen, Liang-Gee ; Chiang, Ming-Cheng | IEEE International Symposium on Circuits and Systems, 1996, ISCAS '96 | 0 | 0 | |
172 | 1983 | Numerical analysis of an injection laser with stripe geometry | Chen, L.G.; Chang, C.Y.; Su, Y.K.; Wu, T.S.; LIANG-GEE CHEN | Optics and Lasers in Engineering | 0 | 0 | |
173 | 1994 | Object-oriented video coding algorithm for very low bit-rate system | Chen, Liang-Gee ; Chiu, You-Ming; Chiueh, Tzi-Dar ; Jong, Her-Ming | IEEE Asia-Pacific Conference on Circuits and Systems, 1994. APCCAS '94 | 0 | 0 | |
174 | 2007 | On-chip memory optimization scheme for VLSI implementation of line-based two-dimentional discrete wavelet transform | Cheng, Chih-Chi; Huang, Chao-Tsung; Chen, Ching-Yeh; Lian, Chung-Jr; Chen, Liang-Gee; LIANG-GEE CHEN | Ieee Transactions on Circuits and Systems for Video Technology | 24 | 18 | |
175 | 1994 | One-Dimensional Full Search Motion Estimation Algorithm For Video Coding | Chen, M.-J.; Chiueh, T.-D.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 119 | 140 | |
176 | 2006 | One-pass computation-aware motion estimation with adaptive search strategy | Chen, C.-Y.; Huang, Y.-W.; CHIA-LIN LEE; LIANG-GEE CHEN | IEEE Transactions on Multimedia | 26 | 21 | |
177 | 1991 | Optimal module set and clock cycle selection for DSP synthesis | Chen, Liang-Gee ; Jeng, Lih-Gwo | IEEE International Sympoisum on Circuits and Systems, 1991 | 0 | 0 | |
178 | 2003 | Parallel 4×4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264 | Wang, Tu-Chih; Huang, Yu-Wen; Fang, Hung-Chi; Chen, Liang-Gee | 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03 | |||
179 | 1994 | Parallel Architectures for 3-Step Hierarchical Search Block-Matching Algorithm | Jong, H.-M.; Chen, L.-G.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 115 | 96 | |
180 | 1994 | Parallel architectures of 3-step search block-matching algorithm for video coding | Jong, Her-Ming; Chen, Liang-Gee ; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 1994. ISCAS '94 | 0 | 0 | |
181 | 2005 | Parallel embedded block coding architecture for JPEG 2000 | Fang, Hung-Chi; Chang, Yu-Wei; Wang, Tu-Chih; Lian, Chung-Jr; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 39 | 30 | |
182 | 2004 | Parallel global elimination algorithm and architecture design for fast block matching motion estimation | Huang, Yu-Wen; Tsai, Chen-Han; LIANG-GEE CHEN | IEEE International Conference on Acoustics, Speech, and Signal Processing, 2004. (ICASSP '04). | 0 | 0 | |
183 | 2001 | Partial-result-reuse architecture and its design technique for morphological operations | Chien, Shao-Yi ; Ma, Shyh-Yih; Chen, Liang-Gee | IEEE International Conference on Acoustics, Speech, and Signal Processing, 2001.(ICASSP '01). | 0 | 0 | |
184 | 2005 | Partial-result-reuse architecture and its design technique for morphological operations with flat structuring elements | Chien, Shao-Yi ; Ma, Shyh-Yih; Chen, Liang-Gee | IEEE Transactions on Circuits and Systems for Video Technology | 32 | 22 | |
185 | 1988 | Partitioned Matrix Arithmetic with High Reliability | 張莉莉((Lily Chang); 陳良基(Liang-Gee Chen); LIANG-GEE CHEN | 國防管理學報 | |||
186 | 2003 | Performance analysis of hardware oriented algorithm modification in H.264 | Wang, Tu-Chih; Huang, Yu-Wen; Fang, Hung-Chi; Chen, Liang-Gee | International Conference on Multimedia and Expo, ICME '03 | |||
187 | 2003 | Perspectives of multimedia SoC | Tseng, Po-Chih; Chen, Liang-Gee | IEEE Workshop on Signal Processing Systems, SIPS 2003 | |||
188 | 1995 | Pipeline interleaving design for FIR, IIR, and FFT array processors | Chen, L.-G.; Jehng, Y.-S.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | Journal of VLSI Signal Processing | 0 | 0 | |
189 | 2003 | Platform architecture design for MPEG-4 video coding | Chao, Wei-Min; Chang, Yung-Chi; Hsu, Chih-Wei; LIANG-GEE CHEN | International Conference on Image Processing, ICIP 2003 | 0 | 0 | |
190 | 2006 | Platform-based MPEG-4 SOC design for video communications | Chang, Y.-C.; Chao, W.-M.; Hsu, C.-W.; Chen, L.-G.; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 0 | 2 | |
191 | 2004 | Platform-based MPEG-4 video encoder SOC design | Chang, Yung-Chi; Chao, Wei-Min; Chen, Liang-Gee | IEEE Workshop on Signal Processing Systems, SIPS 2004 | 0 | 0 | |
192 | 2007 | Power-aware multimedia: Concepts and design perspectives | Lian, C.-J.; SHAO-YI CHIEN ; Lin, C.-P.; Tseng, P.-C.; LIANG-GEE CHEN | IEEE Circuits and Systems Magazine | 54 | 35 | |
193 | 2006 | Precompression quality-control algorithm for JPEG 2000 | Chang, Yu-Wei; Fang, Hung-Chi; Cheng, Chih-Chi; Chen, Chun-Chia; LIANG-GEE CHEN | IEEE Transactions on Image Processing | 14 | 10 | |
194 | 2003 | Predictive line search: An efficient motion estimation algorithm for MPEG-4 encoding systems on multimedia processors | Huang, Y.-W.; Ma, S.-Y.; Shen, C.-F.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 21 | 13 | |
195 | 1991 | A predictive parallel motion estimation algorithm for digital image processing | Chen, Liang-Gee ; Chen, Wai-Ting; Jehng, Ten-Shen; LIANG-GEE CHEN | IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1991. ICCD '91 | 0 | 0 | |
196 | 2003 | Predictive watershed: a fast watershed algorithm for video segmentation | Chien, Shao-Yi ; Huang, Yu-Wen; Chen, Liang-Gee | IEEE Transactions on Circuits and Systems for Video Technology | 77 | 50 | |
197 | 2000 | A programmable VLSI architecture for 2-D discrete wavelet transform | Chen, Chien-Yu ; Yang, Zhong-Lan; Wang, Tu-Chih; LIANG-GEE CHEN | The IEEE International Symposium on Circuits and Systems, ISCAS 2000 Geneva. | 12 | 0 | |
198 | 1996 | A pseudo-object-oriented very low bit-rate video coding system with cache VQ for detail compensation | Ku, Chung-Wei; Chen, Liang-Gee ; Chiu, You-Ming; LIANG-GEE CHEN | International Conference on Image Processing, 1996 | 0 | 0 | |
199 | 2010 | Pyramid architecture for 3840 X 2160 quad full high definition 30 frames/s video acquisition | Chao, W.-M.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 11 | 11 | |
200 | 1994 | Rate-Optimal DSP Synthesis by Pipeline and Minimum Unfolding | Jeng, L.-G.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 13 | 0 | |
201 | 1992 | Rate-optimal static scheduling for recursive DSP algorithms by retiming and unfolding | Jeng, L.-G.; Chen, L.-G.; LIANG-GEE CHEN | International Journal of Electronics | 1 | 0 | |
202 | 1993 | A Real-Time Video Signal Processing Chip | Chen, L.-G.; Liu, Y.-C.; Chiueh, T.-D.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Consumer Electronics | 9 | 10 | |
203 | 2004 | Reconfigurable discrete cosine transform processor for object-based video signal processing | Tseng, Po-Chih; Haung, Chao-Tsung; Chen, Liang-Gee | IEEE International Symposium on Circuits and Systems, 2004. ISCAS '04 | |||
204 | 2003 | Reconfigurable discrete wavelet transform architecture for advanced multimedia systems | Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee | IEEE Workshop on Signal Processing Systems, SIPS 2003. | |||
205 | 2005 | Reconfigurable discrete wavelet transform processor for heterogeneous reconfigurable multimedia systems | Tseng, P.-C.; Huang, C.-T.; Chen, L.-G.; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 9 | 6 | |
206 | 2011 | Reconfigurable morphological image processing accelerator for video object segmentation | SHAO-YI CHIEN ; LIANG-GEE CHEN | Journal of Signal Processing Systems | 12 | 10 | |
207 | 2001 | Robust error concealment algorithm for MPEG-4 with the aid of fuzzy theory | Lee, Pei-Jun; Chen, Liang-Gee ; Wang, Wen-June; Chen, Mei-Juan | ICCE. International Conference on Consumer Electronics | 0 | 0 | |
208 | 2011 | Robust heart rate measurement with phonocardiogram by on-line template extraction and matching. | Chen, Y.H.; Chen, H.H.; Chen, T.C.; Chen, L.G.; LIANG-GEE CHEN | Annual International Conference of the IEEE Engineering in Medicine and Biology Society | |||
209 | 1992 | ROM-based special purpose multiplication and its applications | Jong, H.-M.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | Electronics Letters | 0 | ||
210 | 1996 | Scalable implementation scheme for multirate FIR filters and its application in efficient design of subband filter banks | Wu, P.-C.; Chen, L.-G.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Transactions on Circuits and Systems for Video Technology | 1 | 0 | |
211 | 1995 | Scalable implementation scheme for multirate FIR filters and its application in efficient design of subband filter banks | Chen, Liang-Gee ; Wu, Po-Cheng; Chiueh, Tzi-Dar | VLSI Signal Processing | 0 | 0 | |
212 | 1996 | A self-adjusting weighted median filter for removing impulse noise in images | Chen, Chun-Te; LIANG-GEE CHEN | International Conference on Image Processing, 1996 | 0 | 0 | |
213 | 1998 | A simple and low-cost MPEG audio degrouping algorithm | Tsai, Tsung-Han; Chen, Liang-Gee ; Wu, Ren-Jr | 1998 Fourth International Conference on Signal Processing, ICSP '98 | 0 | 0 | |
214 | 1999 | A single chip CMOS APS camera with direct frame difference output | Ma, Shyh-Yih; Chen, Liang-Gee | Custom Integrated Circuits Conference, 1999. | 0 | 0 | |
215 | 2007 | Single reference frame multiple current macroblocks scheme for multiple reference frame motion estimation in H.264/AVC | Chen, Tung-Chien; Tsai, Chuan-Yung; Huang, Yu-Wen; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 16 | 16 | |
216 | 1999 | Single-chip CMOS APS camera with direct frame difference output | Ma, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Journal of Solid-State Circuits | 63 | 53 | |
217 | 1995 | A single-chip viterbi decoder for a binary convolutional code using an adaptive algorithm | Lee, W.-T.; Chan, M.-H.; Chen, L.-G.; LIANG-GEE CHEN ; MAO-CHAO LIN | IEEE Transactions on Consumer Electronics | 4 | 2 | |
218 | 2005 | Special issue on advances in video coding and delivery | Zhu, W.; Sun, M.-T.; Chen, L.-G.; Sikora, T.; LIANG-GEE CHEN | Proceedings of the IEEE | 2 | 0 | |
219 | 2006 | Survey on block matching motion estimation algorithms and architectures with new results | Huang, Y.-W.; Chen, C.-Y.; Tsai, C.-H.; Shen, C.-F.; Chen, L.-G.; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 124 | 97 | |
220 | 2006 | System analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering | Chen, C.-Y.; Huang, C.-T.; Chen, Y.-H.; LIANG-GEE CHEN ; SHAO-YI CHIEN | IEEE Transactions on Signal Processing | 6 | 6 | |
221 | 2000 | System design consideration for digital wheelchair controller | Chen, Ruei-Xi; LIANG-GEE CHEN ; Chen, Lilin | IEEE Transactions on Industrial Electronics | 59 | 48 | |
222 | 1997 | The system implementation of I-phone hardware by using low bit rate speech coding | Chen, Ruei-Xi; Chen, Mei-Juan; Chen, Liang-Gee ; Tsai, Tsung-Han | Signal Processing Systems, SIPS 97 | 0 | 0 | |
223 | 1999 | System level integration methodology for MPEG-2 audio decoder with embedded RISC core | Tsai, Tsung-Han; Chen, Liang-Gee; Wu, Ren-Jr.; LIANG-GEE CHEN | International Symposium on VLSI Technology, Systems, and Applications | |||
224 | 2010 | Tera-scale performance machine learning SoC (MLSoC) with dual stream processor architecture for multimedia content analysis | Chen, T.-W.; Tang, C.-S.; Tsai, S.-F.; Tsai, C.-H.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN ; SHAO-YI CHIEN | IEEE Journal of Solid-State Circuits | 5 | 5 | |
225 | 1994 | Tree-structure architecture and VLSI implementation for vector quantization algorithms | Ku, Chung-Wei; Chen, Liang-Gee ; Chiueh, Tzi-Dar ; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, ISCAS '94 | 0 | 0 | |
226 | 2011 | Trends in design and implementation of signal processing systems [In the Spotlight] | Mansour, M.M.; Chen, L.-G.; Sung, W.; LIANG-GEE CHEN | IEEE Signal Processing Magazine | 2 | 3 | |
227 | 1998 | Using a region-based blurring method and bits reallocation to enhance quality on face region in very low bitrate video | Chen, Chang-Hong; Chen, Liang-Gee ; Chang, Hao-Chieh | IEEE International Symposium on Circuits and Systems, 1998, ISCAS '98 | 0 | 0 | |
228 | 2020 | Utilising Low Complexity CNNs to Lift Non-Local Redundancies in Video Coding | Klopp, J.P.; Chen, L.-G.; SHAO-YI CHIEN ; LIANG-GEE CHEN | IEEE Transactions on Image Processing | 10 | 7 | |
229 | 2002 | An UVLC encoder architecture for H.26L | Wang, Tu-Chih; Fang, Hung-Chi; Chao, Wei-Min; Chen, Hong-Hui; Chen, Liang-Gee | IEEE International Symposium on Circuits and Systems, 2002, ISCAS '02 | |||
230 | 1994 | Vector Quantization Using Tree-Structured Self-Organizing Feature Maps | Chiueh, T.-D.; Tang, T.-T.; LIANG-GEE CHEN ; TZI-DAR CHIUEH | IEEE Journal on Selected Areas in Communications | 15 | 9 | |
231 | 1996 | A very low bit rate video coding system using adaptive region-classified vector quantization | Chen, Yee-Wen; LIANG-GEE CHEN ; Mei-Juan Chen | IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP-96 | 0 | 0 | |
232 | 2010 | Video 2-D-to-3-D conversion based on hybrid depth cueing | Cheng, C.-C.; Li, C.-T.; Chen, L.-G.; LIANG-GEE CHEN | Journal of the Society for Information Display | 3 | 2 | |
233 | 2005 | Video de-interlacing by adaptive 4-field global/local motion compensated approach | Chang, Y.-L.; Lin, S.-F.; Chen, C.-Y.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 66 | 55 | |
234 | 2010 | Video encoder design for high-definition 3D video communication systems | Tsung, P.-K.; Ding, L.-F.; Chen, W.-Y.; Chuang, T.-D.; Chen, Y.-H.; Hsiao, P.-H.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN ; SHAO-YI CHIEN | IEEE Communications Magazine | 6 | 4 | |
235 | 2012 | Visual vocabulary processor based on binary tree architecture for real-time object recognition in full-HD resolution | Chen, T.-W.; Su, Y.-C.; Huang, K.-Y.; Tsai, Y.-M.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN ; SHAO-YI CHIEN | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 19 | 12 | |
236 | 2008 | VLSI Architecture Design of Fractional Motion Estimation for H.264/AVC | Chen, Yi-Hau; Chen, Tung-Chien; SHAO-YI CHIEN ; Huang, Yu-Wen; LIANG-GEE CHEN | Journal of Signal Processing Systems | 13 | 11 | |
237 | 2002 | VLSI architecture design of MPEG-4 shape coding | Chang, H.-C.; Chang, Y.-C.; Wang, Y.-C.; Chao, W.-M.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 9 | 8 | |
238 | 1999 | A VLSI architecture design of VLC encoder for high data rate video/image coding | Chang, Hao-Chieh; Chen, Liang-Gee ; Chang, Yung-Chi; LIANG-GEE CHEN | IEEE International Symposium on Circuits and Systems, 1999, ISCAS '99 | 0 | 0 | |
239 | 2003 | VLSI architecture for discrete wavelet transform based on B-spline factorization | Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee | IEEE Workshop on Signal Processing Systems, SIPS 2003 | |||
240 | 2005 | VLSI architecture for fifting-based shape-adaptive discrete wavelet transform with odd-symmetric filters | Huang, C.-T.; Tseng, P.-C.; LIANG-GEE CHEN | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 4 | 3 | |
241 | 1996 | Vlsi implementation of a selective median filter | Chen, C.-T.; Chen, L.-G.; Hsiao, J.-H.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 28 | 25 | |
242 | 1998 | VLSI implementation of the motion estimator with two-dimensional data-reuse | Lai, Y.-K.; Lai, Y.-L.; Liu, Y.-C.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 5 | 5 | |
243 | 1998 | VLSI implementation of visual block pattern truncation coding | Liu, Y.-C.; Lai, Y.-K.; Tsai, T.-H.; Wu, P.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Consumer Electronics | 1 | 1 | |
244 | 1995 | VLSI-based array dividers with concurrent error detection | Chen, T.-H.; Lee, Y.-P.; LIANG-GEE CHEN | International Journal of Electronics | 0 | 0 | |
245 | 2007 | Word-level parallel architecture of JPEG 2000 embedded block coding decoder | Chang, Y.-W.; Fang, H.-C.; Chen, C.-C.; Lian, C.-J.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Multimedia | 3 | 3 | |
246 | 1998 | 寬頻遠距教學系統在醫學通識教育之應用 | 陳恆順(Heng-Shuen Chen); 陳晶瑩(Jing-Ying Chen); 郭斐然(Fei-Ran Guo); 林家青(Chia-Chin Chen); 陳良基(Liang-Gee Chen); 李明濱(Ming-Been Lee); 陳慶餘(Ching-Yu Chen); LIANG-GEE CHEN | 醫學教育 | |||
247 | 2017 | 打造人工智慧創新環境機制 | 陳良基; LIANG-GEE CHEN | 國土及公共治理季刊 |