第 1 到 77 筆結果,共 77 筆。
公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 | |
---|---|---|---|---|---|---|---|
1 | 1999 | New Schemes of Cache Memory for Multimedia Applications | Shu-Lin Hwang; Jing Liang Tsai; FEI-PEI LAI | 1999 National Computer Symposium, Computer Architecture Workshop | |||
2 | 1999 | A Bipartition-Codec Architecture to Reduce Power in Pipelined Circuits | Shanq-Jang Ruan; Rung-Ji Shang; Feipei Lai; Shyh-Jong Chen; Xian-Jun Huang; FEI-PEI LAI | 1999 IEEE/ACM International Conference on Computer Aided Design | 5 | ||
3 | 1999 | FACE: Fine-tuned Architecture Codesign Environment for ASIP Development | I-Horng Jeng, Feipei Lai; Yuh-Dar Tseng; FEI-PEI LAI | Design Automation for Embedded Systems | |||
4 | 1999 | Cryptographic key assignment scheme for dynamic access control in a user hierarchy | Kuo, F.H.; Shen, V.R.L.; Chen, T.S.; FEI-PEI LAI | IEE Proceedings-E: Computers and Digital Techniques | 43 | 28 | |
5 | 1999 | Multiple branch Prediction for Wide-Issue Superscalar | Shu-Lin Hwang; Che-Chun Chen; FEI-PEI LAI | IEICE Transactions on Information and Systems | |||
6 | 1999 | Commit Protocol for Lower-Powered Mobile Clients | Yen-Wen Lin; Hsiao-Kuang Wu; FEI-PEI LAI | IEICE Transactions on Information and Systems | |||
7 | 1999 | A New Methodology for Object-oriented ASIP Architecture Codesign | I-Horng Jeng; FEI-PEI LAI | 3rd IMACS/IEEE International Multiconference on Circuits, Systems, Communications, and Computers | |||
8 | 1999 | Communication over Two-way Waveform Channels in Wireless Networks | Kuang-Hung Pan; Hsiao-Kuang Wu; Rung-Ji Shang; Feipei Lai; Yen-Wen Lin; FEI-PEI LAI | 1999 IEEE Canadian Conference on Electrical & Computing Engineering | |||
9 | 1999 | Performance Analysis of Broadcast in Synchronized Multihop Wireless Networks | Kuang-Hung Pan; Hsiao-Kuang Wu; Rung-Ji Shang; FEI-PEI LAI | The 7th International Conference on High Performance Computing and networking Europe | |||
10 | 1999 | The Impacts of Synchronized and Non-synchronized Reception on Broadcast in Multihop Radio Networks | Kuang-Hung Pan; Hsiao-Kuang Wu; Rung-Ji Shang; FEI-PEI LAI | 16th National Radio Science Conference | |||
11 | 1999 | RABTB: Range Associative Branch Target Buffer | Shu-Lin Hwang; FEI-PEI LAI | Auckland; Australasian Computer Science Week '99 | |||
12 | 1999 | Effective Proxy Model for Supporting High Quality of Services for Light-Powered Mobile Client | Yen-Wen Lin; Hsiao-Kuang Wu; FEI-PEI LAI | The 13th International Conference on Information Networking | |||
13 | 1999 | 創造發明師資培育整合型計劃─子計劃(三):網路上培育之學習系統 | 賴飛羆 | ||||
14 | 1999 | 創造發明師資培育課程整合型計畫─總計劃 | 賴飛羆 | ||||
15 | 1999 | 工程教育創意培養─工程教育創意培養:總計畫 | 賴飛羆 | ||||
16 | 1998 | Fast block motion estimation using adaptive simulated annealing | Shie, Mon-Chau; Fang, Wen-Hsien; Hung, Kuo-Jui; Lai, Fei-pei | The 1998 IEEE Asia-Pacific Conference on Circuits and Systems | 0 | 0 | |
17 | 1998 | Unified fully-pipelined VLSI implementations of two-dimensional discrete trigonometric transforms | Shie, Mon-Chau; Fang, Wen-Hsien; Wu, Ming-Lu; Lai, Fei-pei | The 1998 IEEE Asia-Pacific Conference on Circuits and Systems | 0 | 0 | |
18 | 1998 | 子計畫二:精確微型諧振陀螺儀之驅動及讀出IC 之設計 | 賴飛羆 | ||||
19 | 1998 | 工程教育創意培養─子計畫四:工程教育創意網際網路論壇互動式搜尋架構 | 賴飛羆 | ||||
20 | 1998 | Requirements specification and analysis of digital systems using fuzzy and marked Petri nets | Shen, V.R.L.; FEI-PEI LAI | IEEE Transactions on Systems, Man, and Cybernetics, Part B: Cybernetics | |||
21 | 1997 | 低功率可攜式多媒體助理之相關技術研究 (I)─子計畫四:低功率PDA CPU設計 | 賴飛羆 | ||||
22 | 1997 | Messagfer om the organizers | Wu, J.S.; Hsu, D.F.; Maggs, B.; Chang, J-F.; Horiguchi, S.; Hsu, C.-C.; FEI-PEI LAI | 3rd International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 1997 | 0 | ||
23 | 1997 | Region-based template deformation and masking for eye-feature extraction and description | Deng, J.-Y.; FEI-PEI LAI | Pattern Recognition | 79 | 56 | |
24 | 1997 | 分散式共用記憶體系統—架構、演算法與發展環境─子計畫一:分散式共用記憶體編譯器之設計與實作(Ⅲ) | 賴飛羆 | ||||
25 | 1996 | Adsmith: an efficient object-based distributed shared memory system on PVM | Liang, Wen-Yew; King, Chun-Ta; Lai, Fei-pei | Second International Symposium on Parallel Architectures, Algorithms, and Networks | 0 | 0 | |
26 | 1996 | A rule-based neural stock trading decision support system | Chou, Seng-Cho Timothy; Yang, Chau-Chen; Chan, Chi-Huang; Lai, Fei-pei | Computational Intelligence for Financial Engineering | 0 | 0 | |
27 | 1996 | 分散式共用記憶體系統編譯器設計與實作 | 賴飛羆 | ||||
28 | 1996 | 高效能智慧型I/O系統晶片設計(II)─高效能智慧型輸出入系統之晶片設計-子計畫四:PDA處理器晶片設計 I | 賴飛羆 | ||||
29 | 1996 | 分散式共用記憶體系統 - 架構演算法與發展環境(I)─分散式共用記憶體系統-架構、演算法與發展環境:子計畫(四)分散式共享記憶體編譯器之設計與實作 | 賴飛羆 | ||||
30 | 1996 | Efficient exploitation of instruction-level parallelism for superscalar processors by the conjugate register file scheme | Chang, M.-C.; FEI-PEI LAI | IEEE Transactions on Computers | |||
31 | 1996 | Image Shading Taking into Account Relativistic Effects | Chang, M.-C.; Lai, F.; Chen, W.-C.; FEI-PEI LAI | ACM Transactions on Graphics | |||
32 | 1995 | 效能智慧型I/O系統之晶片設計─高效能智慧型輸出入系統之晶片設計:子計畫三-平行I/O處理器晶片設計 | 賴飛羆 | ||||
33 | 1995 | 電腦結構發展環境之設計與實作 | 賴飛羆 | ||||
34 | 1995 | Intelligent code migration technique for synchronisation operations on a multiprocessor | Hwang, R.-Y.; FEI-PEI LAI | IEE Proceedings: Computers and Digital Techniques | |||
35 | 1994 | Reducing procedure call overhead: optimizing register usage at procedure calls | Lai, Fei-pei ; Hsieh, Chia-Jung | International Conference on Parallel and Distributed Systems | 0 | 0 | |
36 | 1994 | 智慧型證券投資組合管理與趨勢預測類神經網路資訊系統 | 曹承礎 ; 楊朝成; 賴飛羆 ; 曾承礎 | ||||
37 | 1994 | 超大型積體電路電腦網路輔助設計系統-子計畫五: 多處理機工作站之處理器晶片研製 | 賴飛羆 | ||||
38 | 1994 | 多處理機工作站之處理器晶片研製 | 賴飛羆 | ||||
39 | 1994 | "電腦結構發展環境"的設計及實作 | 賴飛羆 | ||||
40 | 1994 | The complementary relationship of interprocedural register allocation and inlining | Chao, Y.-k.; Hsieh, C.-J.; FEI-PEI LAI | International Journal of Parallel Programming | 1 | 0 | |
41 | 1994 | Guiding instruction scheduling with synchronization markers on a superscalar based multiprocessor | Hwang, R.-Y.; FEI-PEI LAI | IEE Proceedings: Computers and Digital Techniques | |||
42 | 1994 | A superscalar micro-architecture supporting aggressive instruction scheduling | Chang, M.-C.; FEI-PEI LAI | Journal of the Chinese Institute of Engineers, Transactions of the Chinese Institute of Engineers,Series A/Chung-kuo Kung Ch'eng Hsuch K'an | |||
43 | 1993 | Design and test of memory management unit and cache controller chip | Hsieh, David; Lai, Fei-pei | 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering | 0 | 0 | |
44 | 1993 | Design and analysis of a hierarchical and modular local ATM switch | Tsai, Zse-hong; Yu, Kang-yei; Lai, Fei-pei ; TsaiZsehong ; FEI-PEI LAI | Local Computer Networks | 1 | 0 | |
45 | 1993 | ”電腦結構發展環境”的設計及實作 | 賴飛羆 | ||||
46 | 1993 | 超大型積體電路電腦輔助設計系統(I)-總計畫 | 陳良基 ; 林呈祥; 楊武純; 賴飛羆 ; Lai, Fei-Pei | ||||
47 | 1993 | 超大型積體電路電腦輔助設計系統(I)子計畫二:多處理機工作站之處理器晶片研製 | 賴飛羆 | ||||
48 | 1993 | HiMA: a hierarchical and modular ATM switch with partially shared output buffer | Tsai, Z.; Yu, K.; FEI-PEI LAI | IEE Proceedings, Part I: Communications, Speech and Vision | |||
49 | 1993 | A bist RAM architecture with parallel testing in a microprogram ROM | Huang, J.-M.; FEI-PEI LAI | Journal of the Chinese Institute of Engineers, Transactions of the Chinese Institute of Engineers,Series A/Chung-kuo Kung Ch'eng Hsuch K'an | |||
50 | 1993 | Intelligent stock trading system with price trend prediction and reversal recognition using dual-module neural networks | Jang, G.-S.; Lai, F.; Jiang, B.-W.; Parng, T.-M.; Chien, L.-H.; FEI-PEI LAI | Applied Intelligence | |||
51 | 1992 | Estimating register cost using spots | FEI-PEI LAI ; Yeh, Chia-Cheng; Lee, Hung-Chang | TENCON '92. Technology Enabling Tomorrow : Computers, Communications and Automation towards the 21st Century. 1992 IEEE Region 10 International Conference | 0 | 0 | |
52 | 1992 | 超級電腦之研究發展 | 賴飛羆 ; 郭德盛 | ||||
53 | 1992 | 智慧型超大型積體電路設計自動化系統 | 賴飛羆 | ||||
54 | 1992 | 區域ATM交換模組之積體電路設計 | 蔡志宏 ; 賴飛羆 | ||||
55 | 1992 | 超級電腦之研究發展(分項主題:向量、平行編譯器) | 賴飛羆 ; 郭德盛 | ||||
56 | 1991 | SUN 4/490工作站, 硬式磁碟機, (80-0404-E002-25,智慧型超大型積體電路設計自動化系統 (台大VLSI-CAD總計 | 賴飛羆 | ||||
57 | 1991 | 智慧型超大型積體電路設計自動化系統 (台大VLSI-CAD總計畫) | 賴飛羆 | ||||
58 | 1991 | MARS:Zero-Delay Branch List Access Architecture | 賴飛羆 ; Horng, Cheun-Jing; Parng, Tai-Ming; Lai, Fei-Pei | Proceedings of the National Science Council | |||
59 | 1991 | The Implementation of Integer Processing Unit (IPU) of the Mars System | 賴飛羆 ; Jang, G. S.; Chang, T. N.; Juang, Y. L.; Lai, Fei-Pei | 國立臺灣大學工程學刊 | |||
60 | 1991 | 超級電腦之研究發展 | 龐台銘; 郭德盛; 顏嗣鈞 ; 陳良基 ; 雷欽隆 ; 賴飛羆 | ||||
61 | 1991 | ARES-architecture reinforcing superscalar | Lin, Y.-H.; Chang, M.-C.; FEI-PEI LAI | International Symposium on VLSI Technology, Systems, and Applications, Proceedings | 0 | 0 | |
62 | 1991 | 智慧型超大型積體電路設計自動化系統(III) | 楊武純; 陳良基 ; 賴飛羆 ; 龐台銘 | ||||
63 | 1991 | 總計畫:智慧型超大型積體電路設計自動化系統,分項計劃:多處理機工作站之處理器晶片研製 | 賴飛羆 | ||||
64 | 1991 | 多處理機工作站之處理器晶片研製(台大VLSI-CAD子計畫之九) | 賴飛羆 | ||||
65 | 1991 | 智慧型超大型積體電路設計自動化系統(六) | 賴飛羆 | ||||
66 | 1990 | 智慧型超大型積體電路設計自動化系統;多處理機工作站之處理器晶片研製,兼具符號與數值運算能力之多處理機系統中記憶體管理單元及快取記憶體控制器之設計與實作 | 賴飛羆 | ||||
67 | 1990 | MARS: a RISC-based architecture for Lisp | Lee, H.-C.; Tsai, J.-Y.; Parng, T.-M.; FEI-PEI LAI | Engineering Applications of Artificial Intelligence | 0 | 0 | |
68 | 1990 | A memory management unit and cache controller for the MARS system | Wu, C.-Y.; Parng, T.-M.; FEI-PEI LAI | Proceedings of the Annual International Symposium on Microarchitecture, MICRO | 0 | 0 | |
69 | 1990 | 智慧型超大型積體電路設計自動化系統(III) | 賴飛羆 ; 陳良基 | ||||
70 | 1990 | 超級電腦處理機連接網路製作 | 賴飛羆 | ||||
71 | 1990 | 具體數學 | 賴飛羆 | ||||
72 | 1989 | MARS-a RISC-based architecture for LISP | Lee, Hung-Chang; Tsai, Jenn-Yuan; Parng, Tai-Ming; Li, Yu-Gang; FEI-PEI LAI | Tools for Artificial Intelligence, 1989. Architectures, Languages and Algorithms. IEEE International Workshop on | 0 | 0 | |
73 | 1989 | MARS-Multiprocessor architecture reconciling symbolic with numerical processing-a CPU ensemble with zero-delay branch/jump | Jang, Gia-Shuh; FEI-PEI LAI ; Lee, Hung-Chang; Maa, Yeong-Chang; Parng, Tai-Ming; Tsai, Jenn-Yuan | VLSI Technology, Systems and Applications, 1989. Proceedings of Technical Papers. 1989 International Symposium on | 4 | 0 | |
74 | 1989 | 智慧型超大型積體電路設計自動化系統;多處理機工作站之處理器晶片研製,整數處理單元之設計 | 賴飛羆 | ||||
75 | 1989 | 智慧型超大型積體電路設計自動化系統(II) | 賴飛羆 ; 林呈祥 | ||||
76 | 1989 | 智慧型超大型積體電路設計自動化系統;多處理機工作站之處理器晶片研製,已發表之相關論文 | 賴飛羆 | ||||
77 | 1989 | 超大型積體電路設計佳化專家系統 | 賴飛羆 |