彷生應用之可高密度堆疊鐵電穿隧接面記憶體陣列開發

Project title

彷生應用之可高密度堆疊鐵電穿隧接面記憶體陣列開發

Internal ID

NSTC111-2221-E-002-203-MY3轉入

Principal Investigator

Start Date

August 1, 2023

End Date

July 31, 2024

Organizations

Program in Semiconductor Device, Material, and Hetero-integration

Partner Organizations

National Science and Technology Council