Skip to main content
English
中文
Log In
Log in
Log in with ORCID
NTU Single Sign On
Have you forgotten your password?
Home
.National Taiwan University / 國立臺灣大學
Project / 研究計畫
考量當代電路設計時序與功率問題之實體佈局研究
考量當代電路設計時序與功率問題之實體佈局研究
Details
Primary Data
Project title
考量當代電路設計時序與功率問題之實體佈局研究
Internal ID
98-2221-E-002-119-MY3
Principal Investigator
YAO-WEN CHANG
Start Date
August 1, 2009
End Date
July 31, 2010
Partner Organizations
National Science and Technology Council