Skip to main content
English
中文
Log In
Log in
Log in with ORCID
NTU Single Sign On
New user? Click here to register.
Have you forgotten your password?
Home
.National Taiwan University / 國立臺灣大學
Project / 研究計畫
跨階層最佳化神經網路架構搜尋之智慧硬體加速高能效積體電路實現(2/4)
跨階層最佳化神經網路架構搜尋之智慧硬體加速高能效積體電路實現(2/4)
Details
Primary Data
Project title
跨階層最佳化神經網路架構搜尋之智慧硬體加速高能效積體電路實現(2/4)
Internal ID
112-2218-E-002-028-
Principal Investigator
CHIA-HSIANG YANG
Start Date
May 1, 2023
End Date
April 30, 2024
Organizations
Electrical Engineering
Partner Organizations
National Science and Technology Council
Description
Keywords
神經網路架構搜尋;跨階層最佳化;硬體加速器;記憶體內運算;混合精度;分散式運算;抗變異鐵電電晶體;積體電路設計;Neural architecture search (NAS); cross-layer optimization; hardware accelerator; compute-in-memory (CIM); mixed precision; distributed computing; variation-resilient FeFET; integrated circuits