VLSI Architecture Design and Implementation of Mixed Mode Analog Front-End Signal Processor for Digital Video Transmission (I)
Date Issued
1999-07-31
Date
1999-07-31
Author(s)
汪重光
DOI
882215E002042
Abstract
This project proposes a dual-mode QAM/VSB
transceiver VLSI architecture of cable modems to
solve the bottleneck of the last-mile loops. In order to
perform physical layer synchronization for both QAM
and VSB modes, decision-directed methods are
adopted using equalized channel for both symbol
timing and carrier recoveries. Using the multi-stages
LMS-based blind equalization algorithm, finite wordlength
simulations of full system were conducted
under the conditions of ±6kHz carrier frequency offset,
±200ppm symbol-rate offset, -82dB carrier jitter at
20kHz away from the carrier frequency, and 37dB
SNR at ADC input.
Subjects
QAM/VSB
cable modem
synchronization
decision-directed
LMS
blind
equalization
equalization
finite word-length
Publisher
臺北市：國立臺灣大學電機工程學系暨研究所
Type
report
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