5-bit 10Gb/s 追蹤與保持電路的設計與實作
The Design and Implementation of 5-bit 10Gb/s Track-and-Hold Circuit
Date Issued
2005
Date
2005
Author(s)
Lin, Chia-Liang
DOI
en-US
Abstract
In CMOS circuits, a high-speed track-and-hold circuit is a fundamental and indispensable component in an A/D converter. The track-and-hold amplifier can be classified as the open-loop and the closed-loop architectures. The closed-loop architecture has the characteristic of higher resolution and lower speed. On the contrary, the open-loop architecture has the characteristic of lower resolution and higher speed. Consequently, different kinds of track-and-hold circuits will be needed based on the purpose of the applications. Now no architecture can have both the advantages at the same time.
In this thesis, a 5-bit 10Gb/s track-and-hold circuit has been designed and implemented in a standard 0.18-um CMOS process. It utilizes the high frequency characteristic of MOS transistors to reduce the nonlinearity due to the effect of high-frequency and raise the resolution under high-frequency operation.
Subjects
Analog-to-digital conversion
track-and-hold amplifier
compensation
類比數位轉換器
追蹤保持放大器
補償
Type
thesis
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