A 12.6MW 573-2,901KS/S Reconfigurable Processor for Reconstruction of Compressively-Sensed Phvsiological Signals
Journal
IEEE Symposium on VLSI Circuits, Digest of Technical Papers
Journal Volume
2018-June
Pages
261-262
Date Issued
2018
Author(s)
Abstract
This work presents a reconfigurable processor based on the alternating direction method of multipliers (ADMM) algorithm for reconstructing compressively-sensed signals. The chip delivers a throughput of 573-to-2,901KS/s for reconstructing physiological signals. It dissipates 12.6mW at 87 MHz at 0.6V. Compared to the state-of-the-art designs, the chip achieves a 5.7-to-14x higher throughput with 5-to-11x lower energy for the target reconstruction SNR (RSNR) ? 15dB. ? 2018 IEEE.
Subjects
Biomedical signal processing; VLSI circuits; Alternating direction method of multiplier (ADMM); Lower energies; Physiological signals; Reconfigurable processors; State of the art; Signal reconstruction
SDGs
Type
conference paper