RF Transmitter
Date Issued
2005
Date
2005
Author(s)
Liu, Yu-Hsuan
DOI
en-US
Abstract
A 5~ 6 GHz CMOS transmitter front-end has been designed in this work. This design contains I, Q up-conversion mixers and a VGA followed by an on-chip balun. I, Q mixers translate the baseband signal to a required frequency band and perform signal addition of in-phase and quadrature signal. The up-converted signal is amplified by a VGA to raise the output power level. Then a balun is added at the output for differential-to-single conversion. In order to process the large signals from baseband without saturating the circuit, the front-end demands high linearity performance. Besides, since in this frequency band, the standards such as 802.11a and 802.16e both apply the OFDM modulation scheme, the OFDM signal displays a high Peak-to-Average Power Ratio (PAPR) which sets extra requirement for linearity performance. Therefore, the major concern of this design is linearity such as high third order rejection and high OIP3.
In the up-conversion mixer, we implement the MicroMixer structure. The class-AB topology improves the linearity of the circuit. To gain further bisymmetric baseband signals, the proposed transconductance stage is formed with a cross-coupled type. In VGA, we control the gain with four bits control words and these 16 gain steps are linear-in-dB. At the output of the VGA, an on-chip balun is employed for differential-to-single conversion. It also provides the output loading for the VGA and the low impedance at the output for 50 ohm matching. The whole circuit is integrated with a VCO and a divider as LO signal and it process very good performance in linearity.
Subjects
射頻
發射機
混頻器
可變增益放大器
RF
Transmitter
Mixer
VGA
Balun
Type
thesis
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