Using binary resistors to achieve multilevel resistive switching in multilayer NiO/Pt nanowire arrays
Journal
Npg Asia Materials
Journal Volume
6
Date Issued
2014
Author(s)
Huang, Yen-Chun
Chen, Po-Yuan
Huang, Kuo-Feng
Chuang, Tzu-Chi
Lin, Hsiu-Hau
Chin, Tsung-Shune
Lan, Yann-Wen
Chen, Chii-Dong
Lai, Chih-Huang
Abstract
Reliable multilevel resistive switching in nanoscale cells is desirable for the wide adoption of resistive random access memory as the next-generation nonvolatile memory. We designed NiO-based cells in arrays of multilayered NiO/Pt nanowires to explore multilevel memory effects. Nonpolar resistive switching reproducibly occurs with significantly reduced switching voltages, narrow switching voltage distributions and a robust multilevel memory effect. A high resistance ratio (B10 5 ) between the highand low-resistance states in nanoscale cells enables stable multilevels that can be induced easily by a series of pulsed voltage. The existence of intermediate resistance states in NiO/Pt nanowire arrays can be well explained by the binary-resistor model combined with energy perturbations induced by the pulse voltage. We also verified that the conduction mechanism in multilayered NiO/Pt nanowires is dominated by the hopping of holes. Our bottom-up approach and proposed mechanism explain the controllable multilevel memory effect and facilitate sound device design to encourage their universal adoption.
SDGs
Type
journal article