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College of Electrical Engineering and Computer Science / 電機資訊學院
Electronics Engineering / 電子工程學研究所
Simultaneous floorplanning and buffer block planning
Details
Simultaneous floorplanning and buffer block planning
Journal
Asia and South Pacific Design Automation Conference, ASP-DAC
Journal Volume
2003-January
Pages
431-434
Date Issued
2003
Author(s)
Hui-Ru Jiang, I.
Chang, Y.-W.
Jou, J.-Y.
Chao, K.-Y.
YAO-WEN CHANG
DOI
10.1109/ASPDAC.2003.1195054
URI
http://www.scopus.com/inward/record.url?eid=2-s2.0-0042192063&partnerID=MN8TOARS
http://scholars.lib.ntu.edu.tw/handle/123456789/303292
Type
conference paper