子計畫四：可重組化通訊運算引擎的設計與實現(3/3)
Date Issued
2005-07-31
Date
2005-07-31
Author(s)
DOI
932215E002011
Abstract
The reconfigurable design concept is that we do not need to redesign the hardware circuit. It is
only need to control the engine to change hardware datapath to achieve different system
specifications. Thus we can save the burden of redesigning VLSI circuit. Using the reconfigurable
engine can not only substantially reduce the design cost of the silicon intellectual property, but also
reach the demand for fast time-to-market.
In this project, we have designed a reconfigurable communication computing engine,
including a fast Fourier transform (FFT) processor, a dual-mode Viterbi/ turbo decoder, and a
reconfigurable Reed Solomon decoder. Finally, we utilize the above reconfigurable communication
computing engine to implement a baseband demodulator for multi-mode terrestrial digital video
broadcasting (DVB) systems as an example of practical application.
Subjects
Reconfigurable
fast Fourier transform processor
Viterbi/ turbo decoder
Reed Solomon decoder
digital video broadcasting (DVB)
Publisher
臺北市：國立臺灣大學電子工程學研究所
Type
report
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