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  4. A 1-Volt 802.11a WLAN Receiver and A 1-Volt Dual-Band Tri-Mode Fast-Locked Frequency Synthesizer
 
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A 1-Volt 802.11a WLAN Receiver and A 1-Volt Dual-Band Tri-Mode Fast-Locked Frequency Synthesizer

Date Issued
2004
Date
2004
Author(s)
Chen, Chien-Liang
DOI
en-US
URI
http://ntur.lib.ntu.edu.tw//handle/246246/57344
Abstract
In this work at first a thorough study of WLAN, 802.11a has been done. And then we have explored different architecture for the LNA, VCO, and Frequency Synthesizer. Architecture details and circuit modification are elaborately described in the chapters concerned. As we know that for wireless communication systems, the power consumption and the cost per chip are very important factors. Even though there may be many variations in practice, we find a high degree of commonality in the RF stages of most wireless systems. Therefore we focused our research to design, propose and/or improve every circuit structure so that they can work well under only 1-Volt power supply. Reduction in power consumption and continuous technology scaling are the reason to choose 1- volt power supply. So we first designed a 1-Volt LNA with S11 is -20dB@5GHz, S21 is 7dB@5GHz, and NF is -3.2dB@5GHz. Second a 1-Volt VCO with KVCO is 700MHz/V and Phase Noise is -100dBc@100KHz. Final the PLL intended for wireless LAN applications can synthesize frequencies in 2.4GHz in step of 9.375 MHz and between 5.14 and 5.70 GHz in steps of 20 MHz. The reference spurs at 10-MHz offset are as low as 80 dBc, and the phase noise at 1 MHz is lower than 118 dBc/Hz for the entire tuning range.
Subjects
低雜訊放大器
無線區網
頻率合成器
壓控振盪器
Frequency Synthesizer
VCO
LNA
WLAN 802.11a
Type
thesis
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ntu-93-R91943047-1.pdf

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(MD5):c9bff292d431ffabb1bc382835fb05f0

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