RF Modulator for 802.11b/g/n
Date Issued
2014
Date
2014
Author(s)
Tsai, Li-Fan
Abstract
More and more customers use smart phone and handset devices to surf the internet which push digital communication from generation to generation. In order to meet our needs , communication standard such as 3G/4G and WIFI use more complex modulation scheme that can provide higher data rate.. However ,higher data rate means higher Peak-to-average power ratio (PAPR) which impose more difficulties on RF IC design, so how can we maintain good signal quality and reduce transmitter power consumption becomes an important issue.
This thesis proposes a new RF modulator architecture which achieve the requirement above. This new architecture uses the unique property of 25 percent duty cycle Lo to improve the disadvantage from traditional one and become a passive high gain RF modulator.
I implement a highly-integrated RF modulator chip by TSMC CMOS 90um process, including frequency divider, 25 percent duty cycle generator, input buffer, modulator, driver and two on chip balun. This chip is designed to apply to WLAN 802.11 b/g/n.
Single tone performance IRR= -52dBc,Carrier feedthrough=-58dBc.Output power=-5 dBm, EVM=3.8% with 802.11g 64QAM signal and output power=-7.4 dBm with 802.11n 20MHz signal, EVM=2.6%. Total power consumption=83mW.
Subjects
射頻調變器
四分之一周期本地震盪訊號
802.11
發射機
低功率
Type
thesis
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