Asynchronous Circuit Design with Fast Forwarding Technique
Date Issued
2009
Date
2009
Author(s)
Tang, Chin-Khai
Abstract
In this thesis, a new asynchronous circuit design is presented. Its fine-grained architecture design in circuit block has enabled faster and more efficient self-timed operation, which could achieve higher frequency than other asynchronous circuit design styles. A special technique that enables faster forwarding is also applied, and the forward transition of data token is shortened. The new asynchronous circuit design style is applied to implement self-timed parallel tree fast adders, and the performance is compared to those of static logic and dynamic logic circuits.he new asynchronous circuits are constructed with strong indicatability NMOS pull-down network so that the circuit architecture is simple and faster. More efficient signal generation for restoring the channels and circuit nodes is designed to lower the total transistor area and to improve frequency of operation. The handshaking process and the cycle time of the asynchronous circuits are analyzed, and its performance and functionality under fabrication and temperature variations are evaluated through Monte Carlo simulations in 180nm and 65nm technology nodes. The proposed new asynchronous circuits are compared to the static and domino logic circuits to assess their delay variations and functional success rates under different frequencies and temperatures of operation.
Subjects
Fast forwarding
Asynchronous Circuit Design
Type
thesis
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ntu-98-R95922172-1.pdf
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