Current collapse suppression by SiO2 passivation in p-GaN/AlGaN/GaN enhancement-mode high electron mobility transistors
Journal
2016 Compound Semiconductor Week (CSW) Includes 28th International Conference on Indium Phosphide & Related Materials (IPRM) & 43rd International Symposium on Compound Semiconductors (ISCS)
Date Issued
2016-06
Author(s)
Abstract
Current collapse will cause electrically recession such as reducing the output current density and increasing the dynamic on-resistance. The phenomenon becomes more serious when the device is under high operating voltage and high switching speed. In order to investigate the phenomenon of current collapse, the dynamic output characteristics of the p-GaN/AlGaN/GaN enhancement-mode high electron mobility transistors (E-mode HEMTs) were demonstrated. In this paper, devices with and without SiO 2 passivation layer were tested. Two types of p-GaN HEMTs were fabricated simultaneously except for the passivation process. Normalized R on at different gate stress biases were extracted to numerically express the current collapse phenomenon. The results indicate that the devices with SiO 2 passivation can effectively suppress the phenomenon of current collapse within the gate bias of -15V. We suggest that the effect of SiO 2 passivation is beneficial for suppressing current collapse in E-mode device.
SDGs
Type
conference paper