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  4. High-throughput Hardware Architecture Design and Realization of RaptorQ Code Decoder
 
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High-throughput Hardware Architecture Design and Realization of RaptorQ Code Decoder

Date Issued
2014
Date
2014
Author(s)
Lan, Wei
URI
http://ntur.lib.ntu.edu.tw//handle/246246/276150
Abstract
With advances in technology, there are much more services that a smartphone can provide. The multimedia streaming is the most common one that people use. However, transmission latency is of utmost important to quality of viewing/listening experiences. Unfortunately, wireless transmission often suffers channel fading that renders robust transmission almost impossible without effective error correction mechanism. Conventional protocol generally retransmits the erased coded sequence until the receiver receives it correctly. Fountain codes, on the other hand, keep the partially decoded information and continue to receive and decode the coded symbol until the whole information sequence can be recovered. Such rateless code has drawn a great deal of attention and has been applied in many scenarios. RaptorQ code is the latest generation of Raptor codes. Compared with the previous version, RaptorQ code provides higher flexibility and the lower decoding failure probability. However, the decoding procedure is also much more complicated. Conventionally, the decoding of RaptorQ codes requires inverting a huge matrix. Instead of such costly matrix inversion, we proposed to calculate the inverse of another matrix whose rows are a little different from the one that needs to be decoded. Therefore, most computations are shifted offline. Next, previous decoding usually decodes the intermediate symbols while inverting the matrix, and recovers the information sequence from the intermediate symbols. With the pre-calculated inverse, the proposed algorithm combines the intermediate sequence decoding and the procedure of information sequence recovery to reduce the complexity. Last, due to the systematic code property of the RaptorQ code, we proposed a new method that avoids many unnecessary computation when decoding the received information sequence. Finally, the proposed decoding algorithm is not only simulated on software, but also verified with FPGA board to prove its feasibility.
Subjects
RaptorQ code decoder
fountain code
Matrix inverse lemma
Type
thesis
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ntu-103-R01943133-1.pdf

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