Fully utilized and reusable architecture for fractional motion estimation of H.264/AVC
Resource
Acoustics, Speech, and Signal Processing, 2004. Proceedings. (ICASSP '04). IEEE International Conference on
Journal
International Conference on Acoustics, Speech, and Signal Processing, 2004. ICASSP-04
Pages
-
Date Issued
2004-05
Date
2004-05
Author(s)
DOI
1520-6149
Abstract
We contributed a new VLSI architecture for fractional motion estimation of the H.264/AVC video compression standard. Seven inter-related loops extracted from the complex procedure are analyzed and two decomposing techniques are proposed to parallelize the algorithm for hardware with a regular schedule and full utilization. The proposed architecture, also characterized by a reusable feature, can support situations in different specifications, multiple standards, fast algorithms and some cost considerations. H.264/AVC baseline profile level 3 with complete Lagrangian mode decision can be realized with 290K gates at operating frequency of 100 MHz. It is a useful intellectual property (IP) design for platform based multimedia systems.
SDGs
Type
journal article
File(s)![Thumbnail Image]()
Loading...
Name
01327034.pdf
Size
742.04 KB
Format
Adobe PDF
Checksum
(MD5):1951ddaaa5bd69f36c757b550154bae0