A fast locking and low jitter delay-locked loop using DHDL

Journal

IEEE Journal of Solid-State Circuits

Journal Volume

38

Journal Issue

2

Pages

343-346

Date Issued

2003-02

Author(s)

Hsiang-Hui Chang

Jyh-Woei Lin

DOI

10.1109/JSSC.2002.807399

URI

http://scholars.lib.ntu.edu.tw/handle/123456789/304161

SDGs

[SDGs]SDG7

Type

journal article