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  4. The impact of the P-pillar structure design on Breakdown Voltage for 1.2kV 4H-SiC Superjunction DMOSFET
 
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The impact of the P-pillar structure design on Breakdown Voltage for 1.2kV 4H-SiC Superjunction DMOSFET

Journal
2021 IEEE International Future Energy Electronics Conference, IFEEC 2021
ISBN (of the container)
9781665434485
ISBN
9781665434485
Date Issued
2021-11-16
Author(s)
Yuan-Chen Lee
Kai-Hsun Lin
Kung-Yen Lee  
DOI
10.1109/IFEEC53238.2021.9661656
DOI
10.1109/IFEEC53238.2021.9661656
URI
https://www.scopus.com/record/display.uri?eid=2-s2.0-85124892748&origin=resultslist
https://scholars.lib.ntu.edu.tw/handle/123456789/720332
Abstract
1.2kV-class 4H-SiC super junction (SJ) DMOSFET was designed and optimized in this work. Several P-pillar structures and dosage variation were used to target the charge balance condition in order to optimize breakdown voltage (BV) with low specific on-resistance $(R_{on,sp})$. Vertical electric field distribution of SJ DMOSFET performs a relatively uniform distribution compared with planer DMOSFET. Horizontal electric field distribution shows a peak value at the junction of N and P pillar,while the electric field distribution decline rate affects the final BV value effectively. In this study,we demonstrated the impact of adjusting the P-pillar width and scaling down the device on BV through a series of electric field analysis.
Event(s)
2021 IEEE International Future Energy Electronics Conference, IFEEC 2021, Taipei, 16 November 2021 through 19 November 2021. Code 176234
Subjects
4H-SiC power MOSFET
breakdown voltage
charge balance
DMOSFET
electric field distribution
super junction
Publisher
IEEE
Type
conference paper

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